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Analysis of Cascode configuration Amplifier

  1. Dec 10, 2013 #1
    1. The problem statement, all variables and given/known data

    X3GDpwb.png

    2. Relevant equations

    See above picture.

    3. The attempt at a solution

    I am stuck on the first part, i know i need to find the x intercept of the DC load line is at +Vcc, and I am pretty sure the y intercept is at Vcc/R7, but I do not know how to use this information to find the Q point.

    The Q point is the current and Vce drop when there is no input signal. So i think i am supposed to assume that Vin is 0V and see what that gets me.

    Well if Vin is zero volts then Vb of Q1 is 0V which means Ve of Q1 is -0.7 volts. From this we can find the current through R5 because the it should equal (-0.7 - -Vcc)/R5. I am now wondering if that means the the current through R4 is also this amount because the collector current is approximately the same as the emitter current. But i have no idea, furthermore i don't know how to use this information to help me determine the Q point of Q3 (i am really just spitballing).

    Any help is much appreciated!

    EDIT: So i believe i have a different approach to solving part a. If we assume negligible current goes into the base of each transistor we can use a voltage divider to find the voltage at the base of Q1, this would be Vcc *[R3/(R1+R2+R3)], lets call this Vb. Now we use the standard diode drop 0.7 to find the voltage of the emitter. Then using the above method for finding current through the emitter resistor of the Q1 we find that Ie = (Vb-0.7-(-Vcc))/R4. So this is the current through the emitter resistor. I don't know if we can assume this is also the current through the collector resistor of Q1, but if it is we can simply find the voltage at the collector of Q2 via Vcc - Ie*R4.

    This gives us the voltage before R6. But now i don't know where to go...also i don't know if this second method i used is the correct one, but it makes more sense to me that the first one wrote down.
     
    Last edited: Dec 10, 2013
  2. jcsd
  3. Dec 10, 2013 #2

    rude man

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    Incorrect. The bottom of R3 does not go to ground. Fix this up.
    You mean R5.

    You mean Q2.
    Why wouldn't you? alpha = 1.
    Good to here.

    You're OK once you fix your early problems.

    The rest should be easy. What does R6 really do? (Hint: very little).

    So then what is the dc voltage at Q3-b and Q3-e? The you're done.
     
  4. Dec 10, 2013 #3
    I have never used a voltage divider when it doesn't got to ground... I am unsure how to do this. Would it be [itex]V_b = \frac{[Vcc-(-Vcc)]R_3}{R_1+R_2+R_3} = \frac{2VccR_3}{R_1+R_2+R_3}[/itex]

    Yes i meant R5, so [itex]I_{Q1e} = \frac{V_b}{R_5} [/itex]

    I don't know what alpha you are referring to. I didn't know we could assume the current through [itex]I_{Q1e} [/itex] was the same down the entire line of collectors and emitters because I feel like some of the current has to split off such as through R6 and into the base of each transistor, but i know the current into the trasistor is negligble, what i do not know is if the current into R6 is negligible.

    by the way, thanks so much for your help!

    So using what we know we can solve for the current through the emitter resistor of Q3, does that give us the quiescent current right away? And also we know the Vce of Q3 since we can find out Ve of Q3.

    I am not sure what R6 actually does in this circuit, if its negligible why do we even have it?

    For part b what does it mean by 'maximum mid-frequency input' so the output is undistorted? Are they asking me to find the AC load line?
     
    Last edited: Dec 10, 2013
  5. Dec 10, 2013 #4

    rude man

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    No, that would be correct if the low side went to ground and the high side were 2Vcc.

    You need to solve this using KCL or KVL or whatever. I personally sum currents to zero at every independent node which is close to KVL but not quite.
    Alpha is ic/ie. If ib = 0, ic = ie.

    Unless you are given a 'trick' question, if it's a linear circuit assume ALL base currents are zero (unless the instructor orders otherwise). You made the right decision to let all ib = 0 so why are you questioning it now? No current can pass through R6 because that would mean a finite base current for Q3.
    Yes. Quiescent currents and voltages everywhere.

    We "have it" because someone has a share in a resistor company and wants them to sell lots of unneeded resistors. :smile:
    The input filter is a high-pass so low frequencies have low gain. At some frequency f0 the gain is 3 dB below the "high-frequency" gain. At frequencies >> f0 the transistors themselves start to roll off gain.

    For part (b) you can simply assume C2 to be infinitely large, use any frequency you like and ignore the high-frequency transistor rolloff. Your job is to compute the voltage at every node in the circuit and determine when clipping of the sine wave occurs at any one of them. The corresponding input voltage is the answer to part (b).

    For part (c) you will need to compute f0 among other things.
     
  6. Dec 10, 2013 #5
    Sorry but I am confused what to do for part b. You said assume the input capacitor are infinitely large? So no matter the frequency it is always cut off? How does that help us? And what do you mean by "roll off" of the transistors.

    Are you suggesting i need to calculate the AC load lines for each transistor?

    Thanks again for the help!
     
    Last edited: Dec 10, 2013
  7. Dec 10, 2013 #6
    Also how would we approach this problem if we didn't assume that the current going into the base of the transistors is negligible? Would it be much harder to calculate the new base voltage?
     
  8. Dec 10, 2013 #7

    rude man

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    It's a high-pass, not a low-pass. So all frequencies ABOVE f0 get through. Frequencies BELOW f0 get cut off.
    I mean if the frequency is REALLY large, like >> f0, then the transistors with their little "built-in" capacitors reduce the gain all by themselves.
    Never mind load lines. I never use them. You don't need load lines unless your instructor tells you to come up with one.
     
  9. Dec 10, 2013 #8
    So how exactly do i go about calculating f0 for this circuit? And what does that tell me about the mid-frequency voltage?

    And is it effected by the fact that i am supposed to not ignore the current going into the bases of the transistors?
     
  10. Dec 10, 2013 #9

    rude man

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    Assume the mid-frequency is 10 f0.

    To calculate f0, consider C1 a short circuit for f0.

    So what kind of voltage divider do C2, R2 and R3 make? I mean, what is the cutoff frequency f0?
    Use KVL etc. if you have to.
     
  11. Dec 10, 2013 #10
    Why do we assume mid-frequency is 10 f0? What exactly is "mid-frequency"?

    I'm sorry but I don't quite understand what you mean by a voltage divider of C2, R2, and R3?
     
  12. Dec 10, 2013 #11

    rude man

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    Look up "high-pass RC network" on the Web. Then remember what I said: C1 looks like a short to ac. Also, of course, so does -Vcc.

    Then I have to let you figure it out for yourself because otherwise I'd be doing the whole shebang for you.

    "Mid-frequency" in this context is a frequency well above f0 but not so high as to have the transistors reduce the gain by themselves. I picked 10f0. As far as you're concerned, 'mid-frequency' and 'high-frequency' mean the same thing here because you're fortunately not asked to take th high-freq. response of the transistors into account.

    If you had to include finite base currents the work would be a lot more tedious. Freq. response would not be affected, neither would gain.

    Any circuit where beta is important is a crummy circuit because beta can vary by 5:1 for a given transistor type, not to mention temperature sensitivity.
     
  13. Dec 10, 2013 #12
    I looked up high pass RC network and it just gave me a simple RC passive filter. If C1 is a short to AC then the voltage divider at the node between C2, R2, and R3 is a low pass filter? How does that help us determine the frequency that causes distortion?
     
  14. Dec 10, 2013 #13

    rude man

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    Why do you persist in saying "low-pass filter"?

    The filter from the input to the base of Q1 is a high-pass filter.

    And you're misquoting the question; it asks for the max. input voltage amplitude, not the frequency that causes distortion.
     
  15. Dec 10, 2013 #14
    Ah, i see now, sorry!

    I am just confused how to start with this question. I know you asked what kind of voltage divider C1, R2, and R3 create, but dividing between what two points?
     
  16. Dec 10, 2013 #15

    rude man

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    What does a high-pass R_C filter look like?
     
  17. Dec 10, 2013 #16
    A capacitor and a resistor in series, with voltage out taken in between, right?
     
  18. Dec 10, 2013 #17

    rude man

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    Yes, but where is the R and where is the C?
    Where is the input, where is the output, and what goes to ground?
     
    Last edited: Dec 10, 2013
  19. Dec 10, 2013 #18
    Input is connected to capacitor, then to resistor, then to ground.

    In my circuit the input is at Vin, it passes the capacitor and then the current splits, some goes up to R2 and some into the base of Q1, and some down to R3. None of it goes to ground it seems, but i suppose that doesn't really matter since its just a potential like any other.
     
  20. Dec 11, 2013 #19

    rude man

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    Both R2 and R3 go to ground. AC ground! What is "ground"? It's just volts = 0. What is the ac voltage at the other ends of R2 and R3?

    Your statement about "... a potential like any other" makes no sense to me.

    The base of Q1 does not count. It looks like a very high resistor to both ac and dc. There is no current into Q1-b, either ac or dc.

    While I'm at it I might as well give my lecture on the important distinction between ac and dc parameters. I urge you to always use caps for dc and lower-case for ac quantities.

    So actually it should be v_in, not V_in, for example. The dc gain V_out/V_in = 0 thanks to C2.
     
  21. Dec 11, 2013 #20
    Ah! That makes so much sense! because constant voltage sources are ground in AC analysis!

    Okay so if the voltage drops to ground over both R2 and R3 doesn't that mean that mean that that the currents through R2 and R3 are different? because the resistor values are different. I'm sorry but I don't quite see how this gets us closer to finding the maximum mid frequency voltage?
     
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