Are There Mistakes in My ARM Cortex-M Machine Code Exercises?

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The discussion revolves around a user seeking help with their ARM Cortex-M machine code exercises, expressing uncertainty about their correctness. They provided specific machine code examples and asked for feedback on any potential mistakes. Key points include queries about the operations performed by certain instructions, such as the difference between SUB and SUBS, and the implications of the ORR instruction. Additionally, there is a focus on calculating the results of adding two 8-bit numbers and determining the corresponding flag register values. The conversation highlights the need for clarity in understanding ARM Cortex-M operations and flag behaviors.
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Homework Statement


Hey guys. I am just learning machine code for Cortex-M. There are a few exercises within the textbook, however, I am not entirely sure if I am doing them correctly. If you could possible look over my work to see if there are any mistakes, I would greatly appreciate it! They are supposed to be relatively simple, however, I am still not entirely sure.

Each line represents a specific set of machine code. I will provide the code adjacent in brackets.

R0----R1----R2
0x45-----------(MOV R0, #0x45)
0x45 0x02------(MOV R1, #0x02)
0x45 0x02 0x47 (ADD R2, R0, R1)
0x45 0x02 0x43 (SUB R2, R0, R1)
0x45 0x02 0x43 (SUBS R2, R0, R1)
0x45 0x02 0x05 (AND R2, R0, #0x01)
0x45 0x02 0x05 (ORR R0, R0, #0x01)
0x0F 0x02 0x05 (MOV R0, #0x0F)
0x0F 0x0F 0x05 (MOV R1, #0x0F)
0x0F 0x0F 0x05 (CMP R1, R0)
0x0F 0x0F 0x00 (SUBS R2, R0, R1)



The other part had to do with with flags. We are given A and B, two 8-bit numbers, where R = A + B. We have to determine what R would equal, and what the values of the flag registers would be (NZVC).

A---------- B---------- R---------- NZVC
10--------100---------110-------- 0000
0x40------0xA2--------0xC0-------0000
0xC3------0x6F--------0x32-------0001
100-- ----(-100)-------0---------- 0100
110-------146---------0---------- 0101
50---------206-------- 0---------- 0101
 
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sandy.bridge said:

Homework Statement


Hey guys. I am just learning machine code for Cortex-M. There are a few exercises within the textbook, however, I am not entirely sure if I am doing them correctly. If you could possible look over my work to see if there are any mistakes, I would greatly appreciate it! They are supposed to be relatively simple, however, I am still not entirely sure.

Each line represents a specific set of machine code. I will provide the code adjacent in brackets.

R0----R1----R2
0x45-----------(MOV R0, #0x45)
0x45 0x02------(MOV R1, #0x02)
0x45 0x02 0x47 (ADD R2, R0, R1)
0x45 0x02 0x43 (SUB R2, R0, R1)
0x45 0x02 0x43 (SUBS R2, R0, R1)
0x45 0x02 0x05 (AND R2, R0, #0x01)
0x45 0x02 0x05 (ORR R0, R0, #0x01)
0x0F 0x02 0x05 (MOV R0, #0x0F)
0x0F 0x0F 0x05 (MOV R1, #0x0F)
0x0F 0x0F 0x05 (CMP R1, R0)
0x0F 0x0F 0x00 (SUBS R2, R0, R1)
What's your question? Were you supposed to indicate the values of the three registers for each of the op codes above?
sandy.bridge said:
The other part had to do with with flags. We are given A and B, two 8-bit numbers, where R = A + B. We have to determine what R would equal, and what the values of the flag registers would be (NZVC).

A---------- B---------- R---------- NZVC
10--------100---------110-------- 0000
0x40------0xA2--------0xC0-------0000
0xC3------0x6F--------0x32-------0001
100-- ----(-100)-------0---------- 0100
110-------146---------0---------- 0101
50---------206-------- 0---------- 0101
 
Hi Mark44,

The table was left blank and we were merely given the code indicated in brackets. I then filled out the table accordingly. For the second portion, R = A + B. We were supposed to fill out R and indicate what value the flag registers would be. Sorry I was no more clear.
 
I'm not familiar with Cortex-M, so caveat emptor.

Most of your entries in the table look OK, but there are a few that I'm uncertain of.

For this one -- (SUB R2, R0, R1) -- I'm guessing that the CPU calculates R0 - R1 and stores the result in R2. If so, then what you have for the registers looks fine.

For this one -- (SUBS R2, R0, R1) -- I don't know what the opcode SUBS means, signed subtract?

For this one -- 0x45 0x02 0x05 (ORR R0, R0, #0x01) -- I suspect this is different from OR, but I don't know how it's different. In any case, it looks to be ORing what's in R0 with 0x01, which would just result in the same thing, since what's in R0 is odd.

For the table with flag values, what were you given and what did you fill in?
 
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