Are truth tables necessary for VHDL digital design?

[needroom]

inore

 

[story645]

I try to write the truth table but can't fully figure out.

You don't actually really need truth tables for VHDL. It's control code, so it's closer to programming in its own way. It might be easier if you start by mapping out the logic/control flow/decisions, use that to get the state diagram and get the truth table from the state diagram.

Start with the different elements/states:

ITEM NUMBER (00||01||10||11)
SELECT (0|1)<-off/on
DISPENSING LED (0,1)
LED, INSUFFICIENT_VALUE
TOP_UP
etc