# BJT Amplifiers - Loadline question

taylorwinston
Hello,

I had a basic analog electronics course this summer. Now that I'm trying to design my own circuit with a bipolar junction transistor (both for fun and to prepare for the future), I'm finding I don't really understand how and why I have to follow certain procedures to get maximum output voltage swing.

I don't understand why you have to consider the AC and DC loadlines' intersection to get the quiescent (Q) point of a transistor, for example of a bipolar junction transistor (BJT) amplifier.

The DC loadline tells me how the collector current will look for a given collector-emitter voltage. It is a negatively linear relationship meaning if I increase the collector-emitter voltage, I get a proportional decrease in collector current. If I want a different result, I have to change the collector and/or emitter resistors.

The AC loadline tells me my maximum possible output swing. Similarly, if I want a different characteristic, I need a different set of impedances or perhaps my input signal could be changed.

Question: Why do I need the intersection to determine the Q point? Why can't I just use the DC loadline's middle to give me the quiescent (Q) point?

Staff Emeritus
This video explains it EECE 251 - BJT Tutorial A (optimum Q point)

LvW
At first, it would be very helpful (even necessary) to have a circuit diagram.
Otherwise, we do not know where the capacitor is which is responsible for the ac load line.
One can assume that the emitter path consists of a resistor RE (DC feedback) and a parallel capacitor, correct?

Secondly, you have not to "consider" the "intersection" between both load lines to get the Q-point. The other way round: You select a proper Q-point on the DC load line - and the AC load line AUTOMATICALLY crosses this point because - without any ac input - there is no other point which fulfills the voltage-current relationships.

Gold Member
I recall that a capacitive load gives an elliptical load line. So I presume C is large enough to have neglible reactance at the operating frequency.

LvW
I recall that a capacitive load gives an elliptical load line. So I presume C is large enough to have neglible reactance at the operating frequency.
Elliptical? The load line does not involve any frequency variation and, hence, is realy a straight "line".

Gold Member
It is in textbooks on amplifiers. I suppose that a capacitive load draws current in quadrature to a resistive load, hence the elliptical load line. In other words, it draws more current when the voltage is not maximum.

cabraham
LvW
Please, can you provide a reference (or better: An excerpt) ?
Thank you
(By the way - you are Claude A.?....nice to meet you again!))

cabraham
Please, can you provide a reference (or better: An excerpt) ?
Thank you
(By the way - you are Claude A.?....nice to meet you again!))
Greetings LvW:
No, I, Claude A., have not participated in this thread so far. I will look it over later & reply if I feel like contributing.
Nice to meet you again, as well. BR.

Claude Abraham