1. Limited time only! Sign up for a free 30min personal tutor trial with Chegg Tutors
    Dismiss Notice
Dismiss Notice
Join Physics Forums Today!
The friendliest, high quality science and math community on the planet! Everyone who loves science is here!

Homework Help: Computer Architecture Practice Final Questions

  1. Jul 1, 2005 #1
    hey I have some computer architecture questions that are freaking me out:

    1) what are the disadvantages and advantages of having larger cell sizes for main memory?
    i said an advantage would be that we could store larger binary digits but a disadvantage would be that we would have fewer cells to use and you would need a big MAR to store the cell addresses.
    any thoughts?

    2) for a main memory size of 500,000 bytes, how big should the MAR be? i figured it should be 22 bits, since 500kb almost equal to 8mb, and 8mb is 2^22 bits. am i on the right track with this one?

    3) this one i just have no clue on:
    Suppose we structure our instruction register such that 6 bits are reserved for the op-code, 20 bits for the first memory address, 20 bits for the second memory address, and 20 for the third memory address. How many distinct op-codes can we use on this machine and what is the maximum size of the memory?

    4) this one if you want to try also
    -Write a BNF grammar that describes the structure of US telephone numbers, which is in the form (xxx)xxx-xxxx or xxx-xxxx where x is any digit from 0 to 9. (1 point)

    -Write another BNF that recognizes the fact that the middle digit of an area code must be a 0, 1, 2, or 3, the first digit of an area code cannot be a 0 or 1, and the first digit of the seven digit phone number cannot be a 0 or 1.

    i have no idea what a BNF grammar is! lol

    I got the possible op codes down, 2^6 or 64 possible op codes. but the maximum size of memory?? as you can tell, i am having huge difficulties with the structure and function of main memory and MAR/MDR stuff.

    any help would be awesome, my final is coming up in a week, im jut trying to get a good grasp on this topic that i am very weak in.
    Last edited: Jul 1, 2005
  2. jcsd
  3. Jul 1, 2005 #2


    User Avatar
    Science Advisor
    Homework Helper

    Interesting questions Jason. People here can help you and you might find additional help down below in the Software and Hardware forums. Try those too.

    Let me try:

    Do you mean number of bits per memory address? Those bits are transmitted from RAM to CPU via a data bus consisting of individual electric lines on the circuit board. Switching from 8 to 16 makes designing the boards more complicated.

    I assume you mean memory address register? Or instruction register as I see it. RAM is accessed in bytes: one address for each byte. How many bits does it take to write 500,000 in base 2?

    Same dif: What's the largest number you can write with 6 bits? 20 bits?

    BNF? you got me dude . . .
  4. Jul 1, 2005 #3


    User Avatar
    Staff Emeritus
    Science Advisor
    Gold Member

    What's remarkable is that I have a degree in computer engineering and 10 years of programming experience... and most of your post makes no sense to me. Perhaps your teacher is teaching you in a non-standard way, but your terminology isn't even recognizable. What's a "cell" in memory? A single bit? I have also never heard of BNF grammars.

    - Warren
  5. Jul 1, 2005 #4
    I suspect that BNF stands for BiNary Function, or perhaps Binary Notation Formula.
  6. Jul 1, 2005 #5


    User Avatar
    Staff Emeritus
    Science Advisor
    Gold Member

  7. Jul 1, 2005 #6
    yes, he is very unconventional to be honest

    thanks for the help guys!!!!
  8. Jul 1, 2005 #7
    Assuming a "cell" is a byte or a minimum addressable word, the last thing you said is incorrect.

    500 kb is almost equal to 8 mb?? Just use a calculator and try some test values for 2^n to see which is greater. Or, take the log base 2 of 500,000 and round up.

    Well, in the course I took there was more addressability than there were memory address bits in the instruction register. This was accomplished by base-offset and indirect memory-access modes, and a third mode that I could describe but forget the name of. But I guess your course seems to assume a simpler scheme, so the advice saltydog gave is probably the answer expected.

    I didn't know the word BNF, but I have done this. You want an opening parenthesis, three x's, a closing parenthesis, three x's, a dash, and four x's. For example:

    <telephone-number> ::= <area-code> <prefix> "-" <suffix>
    <area-code> ::= "(" <digit> <digit> <digit> ")"
    <digit> ::= "0" | "1" | "2" | "3" | "4" | "5" | "6" | "7" | "8" | "9"
    You can fill in the rest, and maybe you get the idea.

    You will need new symbols, something like <digit-less-than-4> and <digit-greater-than-1>
    The MAR is the memory address register, the place where instructions place memory addresses if they want to load something from memory or store it to memory. The MDR is the memory data register, the place where instructions place data to be stored or retrieve data that they loaded.
    Last edited: Jul 1, 2005
  9. Jul 2, 2005 #8
    wow thanks for the detailed post!

    btw, i meant 500kb = 8 million bits. so the MAR must be able to store addresses oh that range, sorry for the confusion. so the question is now, how many binary bits does it take to store up to 8 million? thanks guys

    and i guess if i have 20 bits for an address field, maximum memory size would be 2^20 -1 ? like if i have 4 bits, the highest number i can store is 15 or 2^4 - 1? am i getting it?

    you guys have been great, i really appreciate it
    Last edited: Jul 2, 2005
  10. Jul 2, 2005 #9
    No, you don't care about the bits, because the computer can't directly retrieve an arbitrary individual bit from memory.
    If you have 4 bits, what are the numbers you can store? Write them all down and count them up.
  11. Jul 2, 2005 #10


    User Avatar
    Science Advisor
    Homework Helper

    Hello Jason. RAM is organized in bytes. The CPU addresses RAM by bytes not bits. So when you load the instruction register with and address, say 100, during the fetch cycle, the byte at RAM address 100 will be fetched and placed in some CPU register, all 8 bits of it. Thus to address 500,000 bytes, need a memory address register with enough bits to distinctly reference each one of those bytes.

    I tell you what Jason, don't mean to be rude or nothing but personally, if I were you, I'd start at page one of a good Architecture book, read it and work every single problem and don't go to problem 10 until I've worked the first nine and if I can't work problem 10, I go no further. So you do the same alright? You run into a problem you can't work, you keep reviewing other things, ask for help, research relevant topics, and just come up with some acceptable attempt at solving it before you go further Ok? :smile:

    Edit: Alright, suppose I would skip problems just to make progress but you know what I mean. Good Luck!
    Last edited: Jul 2, 2005
Share this great discussion with others via Reddit, Google+, Twitter, or Facebook