Designing a 2-Input XOR Gate: RL=1KΩ, VDD=1.8V

[jean28]

Homework Statement

Design a 2-input XOR with the following specifications:

R_L = 1KΩ
V_DD = 1.8V
V_OL = 0.1V
V_OH = 1.7V

Homework Equations

Triode:
I_d = μ_nC_ox W/L V_DS (V_GS - V_t - V_DS/2)

Cutoff:
I_d = 0.

The Attempt at a Solution

Searching on my book I found the image attached which is an implementation of an XOR gate with transistors. However, how can I use the voltages given to "design" the transistor? I just don't get it very well.

 

[MATLABdude]

Is the question asking you for an implementation with generic transistors (as in your attached picture), or something involving the design of the transistors themselves (as you imply with your equations)? You can see that you don't need rail-to-rail output (Voh and Vol) and that you need to be able to source enough current to drive a 1k load (i.e. 1.8V / 1k)

 

[CWatters]

FETs have ON resistance that will affect the output voltage delivered to the load. Think of it as a potential divider problem where the output voltage swing must be at least enough to meet the definition of a logic 1 or 0 for the next gate to use as an input.