Disabling Op-Amp ICs - Is Cutting Supply or Ground OK?

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Cutting the supply or ground line to disable an op-amp IC like the LM358 can be risky, particularly if input signals remain connected, as it may lead to damage if not managed properly. It's important to limit current into the signal pins to about 0.25 mA or less, using appropriate series resistance to protect the op-amp. While some argue against this practice due to lack of data sheet support, many have successfully operated op-amps under similar conditions. Additionally, certain op-amps come with a dedicated disable function, which can simplify the process. Care must be taken with CMOS FET op-amps to avoid "CMOS Latchup," ensuring input voltages remain within specified limits.
Jdo300
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Hi All,

I have a quick question for you. If you have a garden variety op-amp IC like the LM358 and you want to disable the output of the op-amp (assuming single supply operation), would it hurt it to "disable" it by cutting the supply or ground line to the IC assuming that signals can still be connected to the inputs? I'm *assuming* that incoming signals would not affect the IC if it were a FET op-amp but I'm not sure about the bipolar ones.

Thanks,
Jason O
 
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Hello Jason,

Most devices will tolerate a bit of current into their signal pins - i.e. driving them from an excessive source. The trick is to have a feel for how much, and insure that you have enough series resistance to keep from damaging the amp while power is removed. As a rule of thumb, I typically keep it at .25ma or less, though older amps with less delicate transistors would likely take much more.

If your signal gets to 12v, than 47K between your op amp and signal would keep you safe. For a 5 volt signal, 20K works.

Note that there are a fair number of guys who will argue that this isn't neccesarily valid because they haven't found it on the data sheet. But then, all of us are guilty of designing circuits in which op amps have been tortured by power supply start up timing, and settling in other ciruits. In those cases, I guess ignorance was bliss ; )

Best of Luck,

Mike
 


Haha thanks for the tips mike. :smile:
 


A word of warning if you try this with CMOS FET op-amps: there is an effect called "CMOS Latchup" which can result in the chip taking destructively high supply currents if the inputs are taken outside the supply rail voltages.

Manufacturers typically specify all voltages to be less than 0.3V beyond the supplies- you should try to arrange resistors in your input circuit to guarantee that. This may require shunt as well as series resistors to be added - and if so you would have to allow for their effects on normal operation.
 
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