Effective Error Correction Codes for Noisy Channels in FPGA-ARM Interfaces

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Discussion Overview

The discussion revolves around effective error correction codes for noisy communication channels between an ARM CPU and an FPGA. Participants explore various methods for error correction, particularly in the context of streaming audio data and the reliability required for hardware accelerators on the FPGA side.

Discussion Character

  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant inquires about error correction methods beyond Hamming codes that can handle multiple bit errors without requiring retransmission.
  • Another participant suggests improving the physical communication channel through methods like differential pairs and shielding, arguing that error correction may introduce significant overhead.
  • A third participant references Reed-Solomon error correction codes as a potential resource for further information.
  • The original poster acknowledges that for streaming audio data, a few errors are acceptable, but emphasizes the need for accuracy in FPGA instructions to prevent system crashes.
  • The original poster concludes they may continue using Hamming codes due to the infrequency of two-bit errors, with a plan to resend data if such errors occur.

Areas of Agreement / Disagreement

Participants express differing views on the effectiveness and practicality of error correction versus error detection and retransmission. There is no consensus on a single best approach, and the discussion remains unresolved regarding the optimal method for error correction in this context.

Contextual Notes

Participants do not fully explore the limitations of their proposed methods, such as the specific conditions under which different error correction codes might be effective or the assumptions about the nature of the data being transmitted.

Jaynte
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I'm designing an interface between an ARM-CPU and a FPGA and have
a pretty noisy channel between them.

So I was wondering if anyone have any tip of error correction code on the FPGA side
except the Hamming method I am using right now.

What I want is a method which can correct if the error is larger than one bit/word without
request a new transfer.
 
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Jaynte,

The obvious answer is to "clean up" the channel/bus, perhaps using differential pairs, fiber optics, shielded cable, proper trace isolation, etc. I can't think of a way to "repair" bad bytes w/o adding significant overhead or having a priori knowledge about the data. Even if you sent an XOR byte of each data byte, you would not know which byte was "good" and which byte was "bad" w/o each byte having a check sum bit. In the end, Error Correction can waste more time/resources than simple error detection & re-sending the data. Of course, a lot depends on the nature of the data. If it is streamed audio/video, a few bad bytes aren't really that big a deal; on the other-hand if the FPGA is responsible for crypto processing even losing a bit can be catastrophic.

Perhaps someone who is a lot smarter than me can give better advice, but the best I can offer is suggesting you make the communications path as pristine as possible and employ error detection and "resend" the failed packets.

Good Luck!

Fish
 
Thanx, I will stream audio data and that part is not a problem if one or two bit is wrong out of 1 MB like it is right now.
But on the FPGA side I have a hardware accelerator which uses instructions and they need to be correct or the system will
crash.

I think I will just use Hamming because there is very seldom I get a 2-bit error and if I do I will just resend.
 
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