Effective Error Correction Codes for Noisy Channels in FPGA-ARM Interfaces

[Jaynte]

I'm designing an interface between an ARM-CPU and a FPGA and have
a pretty noisy channel between them.

So I was wondering if anyone have any tip of error correction code on the FPGA side
except the Hamming method I am using right now.

What I want is a method which can correct if the error is larger than one bit/word without
request a new transfer.

 

[Fish4Fun]

Jaynte,

The obvious answer is to "clean up" the channel/bus, perhaps using differential pairs, fiber optics, shielded cable, proper trace isolation, etc. I can't think of a way to "repair" bad bytes w/o adding significant overhead or having a priori knowledge about the data. Even if you sent an XOR byte of each data byte, you would not know which byte was "good" and which byte was "bad" w/o each byte having a check sum bit. In the end, Error Correction can waste more time/resources than simple error detection & re-sending the data. Of course, a lot depends on the nature of the data. If it is streamed audio/video, a few bad bytes aren't really that big a deal; on the other-hand if the FPGA is responsible for crypto processing even losing a bit can be catastrophic.

Perhaps someone who is a lot smarter than me can give better advice, but the best I can offer is suggesting you make the communications path as pristine as possible and employ error detection and "resend" the failed packets.

Good Luck!

Fish

 

[maimonides]

You can find more information on error correcting codes here:
http://en.wikipedia.org/wiki/Reed–Solomon_error_correction.
And: what Fish said.

 

[Jaynte]

Thanx, I will stream audio data and that part is not a problem if one or two bit is wrong out of 1 MB like it is right now.
But on the FPGA side I have a hardware accelerator which uses instructions and they need to be correct or the system will
crash.

I think I will just use Hamming because there is very seldom I get a 2-bit error and if I do I will just resend.