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FET amplifier input impedance

  1. Feb 29, 2012 #1
    Hello all,
    In one of our labs we determined the input impedance of a FET amplifier circuit via a potentiometer. We were told it was due to "maximum power transfer theorem" (something we have not learnt yet). Essentially we attached a potentiometer in series with the input of the circuit and initially had it set to zero. We then adjusted the potentiometer until the initial input voltage was halved. Following, the resistance of the potentiometer was measured, as this resistance was claimed to be equal in magnitude to the input impedance.

    Is it possible for someone to explain this?
     
    Last edited: Feb 29, 2012
  2. jcsd
  3. Feb 29, 2012 #2
    The maximum power transfer theorem simply says that in order to get maximum power to the load, the load impedance must be equal to the source impedance.

    The pot is inserted as an adjustable source impedance.

    When the voltage across the pot is equal to the voltage across the input then the two resistances are equal. With the two resistances equal, the voltage at the junction of the pot and the input is half the supply value.

    What value did you measure for the input impedance?
     
  4. Feb 29, 2012 #3

    vk6kro

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    Usually source impedance is something you can't do anything about and you want to get as much power into a load as possible.

    If the load resistance is too high, then you get only a small current, while if it is too low, then there is to much voltage drop across the source resistance.

    It works out that the maximum power is delivered when the load resistance equals the source resistance.


    In your experiment, none of this is being done.

    It is an application of the voltage divider principle where if you have two equal resistors in series then they will have equal voltages across them.

    Conversely, if two resistors in series have equal voltages across them, then the resistors have equal resistance.

    So, you can use this to measure an unknown resistance.
     
    Last edited: Feb 29, 2012
  5. Feb 29, 2012 #4
    Nope, we initially had a potentiometer resistance of zero with the input being an ac signal of 206mV peak-peak, the circuit was fed with Vcc=10V. We adjusted the potentiometer until the input voltage to the circuit was ~100V peak-peak, and at this time the potentiometer had a resistance of 142KOhm
     
  6. Feb 29, 2012 #5

    jim hardy

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    ~ 100 milliVolts perhaps, and what frequency?

    At 60 hz is 142K about .02 uf ?
     
  7. Feb 29, 2012 #6
    It was at 1kHz. I decided to provide a picture complementary PSPICE (finally learnt how to use it). The potentiometer was placed before C2, and the input voltage was measured there as well. 0.22uF capacitor at input and 2.24uF at output.
     

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  8. Feb 29, 2012 #7
    If you do it correctly, I doubted you can use a potentiometer to measure DC resistance. Particular the impedance of the MOSFET is so high way into GΩ. Even the JFET impedance is very high.

    For AC, you are measuring the input and Miller capacitance of the MOSFET which the value is very high.
     
  9. Mar 1, 2012 #8

    vk6kro

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    This circuit uses resistors to set the bias of the Mosfet and the measurement includes these and the input coupling capacitor.

    So, we would need to know the value of these resistors to see if they are swamping the normal and Miller capacitances of the Mosfet.

    If the bias resistors and input capacitor are high enough to ignore, then the Mosfet capacitance becomes the main factor.

    Volts in = 0.103 volts peak
    Volts across capacitor = 0.050 volts peak

    Draw the classic voltage triangle

    Voltage across resistor = √( 0.103 2 - 0.0502)
    = 0.090 volts peak
    Note that Vresistor + V capacitor ≠ V input
    Current in resistor = .09 volts / 142 K = 634 μA

    Reactance of capacitor = 0.05 volts peak / 634 μA = 78845 ohms
    Capacitance (frequency=1000 Hz ) = 2019 pF

    This seems pretty high, even for a Mosfet, so the resistors are probably playing a part.
     
  10. Mar 1, 2012 #9
    We wanted the gain to be -5, so we had the following measurements
    [itex]I_D=4.49mA, V_{DS}=5.01V, V_{GS}=3.53V, R_4=249k, R_3=329k, R_2=844.15, R_1=147[/itex]
     
  11. Mar 1, 2012 #10
    At 1000 Hz, C2 won't have a significant effect. The parallel value of R3 & R4 works out to 141.7K which is very close to what you measured, good job.
     
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