builder_user Messages 196 Reaction score 0 Jun 10, 2011 #31 gneill said: All I am saying is, if the terminals at U2 are open (not connected to a source), then there is no loop and no current flows (through terminals U2). When i=0? Attachments dfddfd.JPG 7.4 KB · Views: 392
gneill said: All I am saying is, if the terminals at U2 are open (not connected to a source), then there is no loop and no current flows (through terminals U2). When i=0?
gneill Mentor Messages 20,989 Reaction score 2,934 Jun 10, 2011 #32 builder_user said: When i=0? No current flows through an open circuit. If the terminals at U are open, then current i = 0.
builder_user said: When i=0? No current flows through an open circuit. If the terminals at U are open, then current i = 0.
builder_user Messages 196 Reaction score 0 Jun 10, 2011 #33 gneill said: No current flows through an open circuit. If the terminals at U are open, then current i = 0. How show on the scheme that terminals are opened?
gneill said: No current flows through an open circuit. If the terminals at U are open, then current i = 0. How show on the scheme that terminals are opened?
gneill Mentor Messages 20,989 Reaction score 2,934 Jun 10, 2011 #34 builder_user said: How show on the scheme that terminals are opened? By having them not connected to any component. In the attached figure, the terminals at U1 are not open. The terminals at U2 are open. Attachments Fig4.gif 4.7 KB · Views: 487
builder_user said: How show on the scheme that terminals are opened? By having them not connected to any component. In the attached figure, the terminals at U1 are not open. The terminals at U2 are open.