[Intro Circuits] Simple problem, finding initial

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Discussion Overview

The discussion revolves around finding the initial and final conditions for current (IL) and voltage (Vc) in a circuit with two independent sources that activate at different times. The context includes steady-state conditions before and after the activation of the sources, focusing on DC steady-state (DCSS) analysis.

Discussion Character

  • Homework-related
  • Technical explanation
  • Mathematical reasoning
  • Debate/contested

Main Points Raised

  • One participant states the need to find initial conditions at t = 0- DCSS, suggesting that the 2 + 5u(t) voltage source becomes 2 V and questions the status of the 4u(t) source.
  • Another participant clarifies that before t = 0, the left voltage source is 2 V and the right source is 0 V, prompting the need for steady-state analysis.
  • There is a discussion about the behavior of the unit step function u(t), indicating that it is zero before t = 0 and becomes 1 afterward.
  • One participant expresses confusion about the open circuit condition for the capacitor and seeks confirmation on the values of IL and Vc at t = 0 and t = ∞.
  • Another participant corrects the voltage across the capacitor at t = ∞, indicating that the left side is at 7 V and the right side at 4 V, leading to a disagreement on the calculated voltage difference.
  • There is a mention of a potential sign error in the calculations, with participants discussing the implications of KVL (Kirchhoff's Voltage Law) in their equations.
  • One participant concludes that VC should equal 3 V based on the corrected analysis of the circuit.

Areas of Agreement / Disagreement

Participants express differing views on the final voltage across the capacitor (Vc) at t = ∞, with some agreeing on the values of IL and Vc while others challenge the calculations leading to an 11 V result. The discussion remains unresolved regarding the correct final value of Vc.

Contextual Notes

There are indications of confusion regarding the application of KVL and the behavior of the circuit elements at different time intervals, particularly concerning the open circuit condition for the capacitor and the effects of the independent sources.

jojo13
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Homework Statement



Two independent sources are given. They are active at different times.

Find the conditions at t = 0- DCSS (aka t < 0 DCSS) and t = ∞ DCSS for IL and Vc

U9nbJ1X.jpg


Homework Equations



At DCSS, replace inductor with short circuit
At DCSS, replace capacitor with open circuit

The Attempt at a Solution



So I need to find the initial and final conditions.

Let's start with initial conditions at t = 0- DCSS. The [2 + 5u(t)]V becomes 2 V. The 4u(t) I am not 100% sure about, but I think it becomes a short circuit. Then I replace the inductor and capacitor with a short and open circuit respectively because it is in DCSS.

Is this correct? The switches at 2 + 5u(t) and 4u(t) are giving me a bit of a problem understanding and I'm not sure if I'm doing it right.

As for the final conditions at t = ∞, I have no clue where to start.
 
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I think you're almost there. Before the "t = 0" event where the 5u(t) and 4u(t) sources switch on, the leftmost voltage source will have been producing 2 V since time began, and the rightmost source will have been producing 0 V (your short circuit) for all that time. So you have to find the steady state conditions for (let's call them) V1 = 2 V and V2 = 0 V.

Do the open capacitor / short inductor analysis and find the voltages and currents.

When t = 0 arrives V1 suddenly becomes 2 V + 5 V = 7 V. V2 becomes 4 V. They stay that way from then on, so to the steady state analysis again with these new sources in place in order to find the conditions at t → ∞.
 
gneill said:
I think you're almost there. Before the "t = 0" event where the 5u(t) and 4u(t) sources switch on, the leftmost voltage source will have been producing 2 V since time began, and the rightmost source will have been producing 0 V (your short circuit) for all that time. So you have to find the steady state conditions for (let's call them) V1 = 2 V and V2 = 0 V.

Do the open capacitor / short inductor analysis and find the voltages and currents.

When t = 0 arrives V1 suddenly becomes 2 V + 5 V = 7 V. V2 becomes 4 V. They stay that way from then on, so to the steady state analysis again with these new sources in place in order to find the conditions at t → ∞.

Ok thanks, so for the t = 0- DCSS, the 2+5u(t) becomes 2v and the 4u(t) becomes a short.

Now for the t = ∞, the 2+5u(t) becomes 7V and the 4u(t) becomes 4V? I was thinking that the 2+5u(t) becomes 2V and the 4u(t) becomes 4V
 
u(t) is a unit step function. It's zero for all times before t=0, then 1 for all times t > 0.

So once the u(t)'s have turned on, they stay on.
 
gneill said:
u(t) is a unit step function. It's zero for all times before t=0, then 1 for all times t > 0.

So once the u(t)'s have turned on, they stay on.

Ahhh I see.

So just to confirm... At both t = 0 and t = ∞, the left side is 7V and the right side is 4V.

That makes a lot more sense than what I was thinking.
 
jojo13 said:
Ahhh I see.

So just to confirm... At both t = 0 and t = ∞, the left side is 7V and the right side is 4V.

That makes a lot more sense than what I was thinking.
Yup. To be specific, for all time up to and including t = 0- the left side is 2 V and the right is 0 V. At t = 0+ the left side becomes 7 V and the right side 4 V and they stay that way indefinitely.
 
gneill said:
Yup. To be specific, for all time up to and including t = 0- the left side is 2 V and the right is 0 V. At t = 0+ the left side becomes 7 V and the right side 4 V and they stay that way indefinitely.

ok I think I got the final answers. Mind checking if I did them right. I was a bit confused on the open circuit at VC, so I wanted to make sure it's correct.

At DCSS, replace inductor with short circuit
At DCSS, replace capacitor with open circuit For t = 0- DCSS, I got IL = 0A and VC = 2V

For t = ∞ DCSS, I got IL = -4A and VC = 11V
 
Looks good except for your Vc at t = ∞. The top end of the resistor should be at 4 V, the left end of the cap at 7V. I don't see an 11 V difference there...
 
gneill said:
Looks good except for your Vc at t = ∞. The top end of the resistor should be at 4 V, the left end of the cap at 7V. I don't see an 11 V difference there...

Hmm, I must have done a sign error or something, this is the work I did for it

iitbqhi.jpg


I first found IL which was -4 A. Then I did KVL on the left side which I found to be -VC + 7V - V1 = 0. I subsituted V1 to be (-4 A)*(1 ohm) and solved for the rest. Ended up with 11V.
 
  • #10
jojo13 said:
Hmm, I must have done a sign error or something, this is the work I did for it

iitbqhi.jpg


I first found IL which was -4 A. Then I did KVL on the left side which I found to be -VC + 7V - V1 = 0. I subsituted V1 to be (-4 A)*(1 ohm) and solved for the rest. Ended up with 11V.
-VC + 7V - V1 = 0.

that's your problem. take another look at that equation
 
  • #11
Look at the circuit. The capacitor is an open so the only current path is for the 4V supply through the resistor. As you say, IL is -4 A, so it's flowing down through the resistor leaving +4 V at its top end. That's the right side of the cap. The left side of the cap is fixed at +7V.
 
  • #12
donpacino said:
-VC + 7V - V1 = 0.

that's your problem. take another look at that equation

gneill said:
Look at the circuit. The capacitor is an open so the only current path is for the 4V supply through the resistor. As you say, IL is -4 A, so it's flowing down through the resistor leaving +4 V at its top end. That's the right side of the cap. The left side of the cap is fixed at +7V.

-VC + 7V + V1 = 0.

VC = 3 V
 

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