Karnaugh Maps: An Essential Tool for Understanding Complex Digital Logic Designs

[paulfr]

Sad to say but ...

Karnaugh maps became an obsolete intellectual curiosity when vacuum tubes and relays were replaced by dense semiconductor logic in the late 60's. Hardware is cheap and minimization is not usually worth the effort except in certain cases such as a cell for some memories that must be repeated many many times.

If I am wrong about this, I would love to be educated.
What practical use are they today ?

I remember having much fun learning them in Engineering school in the 60's.

You should put out a book / pamphlet with your articulation here.

Very nice
Thank you

 

[MisterX]

Hardware is cheap and minimization is not usually worth the effort

I'm no expert on the digital design of today but I think your argument that logic minimization is no longer worthwhile is wrong, paulfr.
In many cases it the minimization may be performed software in a step called logic synthesis.

 

[paulfr]

Point well taken

When I said "not worth the effort" , I meant by hand, yes.

Of course design automation SW will implement a minimization
step in a way specified with constraints called out by the designer.
Min power, min silicon real estate, maximum speed, etc

 

[estro]

Six variables horizontally, and four vertically. This would take probably at least an 11" X 17" sheet and a lot of work (both the drawing and the use). I have done it so I know. Sorry it took this long.

KM

I hope that you understand that in real world minimization is not done by Karnaugh maps.

 

[Kenneth Mann]

Sad to say but ...

Karnaugh maps became an obsolete intellectual curiosity when vacuum tubes and relays were replaced by dense semiconductor logic in the late 60's. Hardware is cheap and minimization is not usually worth the effort except in certain cases such as a cell for some memories that must be repeated many many times.

If I am wrong about this, I would love to be educated.
What practical use are they today ?

I remember having much fun learning them in Engineering school in the 60's.

You should put out a book / pamphlet with your articulation here.

Very nice
Thank you

Yours are wonderful observations, but I couldn't disagree more. First, if you've followed these insertions, minimization itself is not the main thrust. The main use is to define logic relations that accomplish the desired tasks without design blow-ups. Little attempt was made to determine whether the end products were minimum or not - - though this is desired. The interest was simply to get the job done with the least extended effort and the greatest understanding of the end product.

Today, the design effort is often devoted to very large dense packages, and the essential ingredient is toward understanding what is going on within those packages. We use Hardware Definition Languages to help us get through the difficulty and complex accounting involved in designing those packages. These allow us several shortcut approaches, but in the end they are simply alternative means of laying out the real-estate and defining the interrelations needed to accomplish our logic schematics, and as such, are totally interchangeable if we desired to do so. We specify our preferred constructs and approaches and , with luck, the software lays out the real-estate using the logic substitutions that are pre-defined in the definition of the languages - - according to how the language builders determined their preferred approaches.

It is important, however, that the designer still understand what goes into a logic design - - and not simply minimization, but what makes it work. The design aids won't do the designing for you; they simply make it more convenient. Without the understanding of the underlying relationships as can be worked out by mapping (and other approaches to symbolic logic) Complex designs become much more difficult. You wind up with a few days or weeks of design lay-out, followed by months or even years of trouble-shooting.

KLM