Logic gates and truth table problems

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Discussion Overview

The discussion revolves around logic gates and the construction of truth tables, specifically addressing a homework problem involving the outputs of various gates based on binary inputs. Participants explore the correct representation of input values and outputs in truth tables, as well as potential interpretations of the results.

Discussion Character

  • Homework-related
  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant presents an initial truth table with outputs for various gates based on binary inputs.
  • Several participants emphasize that the A and B columns should represent all possible binary combinations {00, 01, 10, 11}.
  • There is a discussion about how to derive the values in the truth table, with some participants questioning the original values presented.
  • Another participant suggests that the final truth table should only include columns for A, B, and the output C.
  • Some participants note the symmetry in the circuit diagram as reflected in the truth table outputs.
  • There is speculation about what the output C could represent in terms of familiar logic gates, with references to AND, OR, NOR, NAND, and EXOR gates.

Areas of Agreement / Disagreement

Participants generally agree on the need for a complete representation of input values in the truth table, but there is no consensus on the interpretation of the output C or what it specifically represents in terms of logic gates.

Contextual Notes

Some participants express uncertainty about how to derive specific output values from the inputs, indicating potential limitations in their understanding of the relationships between the gates and their outputs.

moenste
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Homework Statement


c169c8f91af3.jpg
2. The attempt at a solution
Circuit:
91e7e7e803e9.jpg


A B G D E F C
0 0 1 1 1 1 0
1 1 0 1 0 1 0
0 0 1 1 1 1 0
1 1 0 1 0 1 0Answer:
4a4a394bc57f.jpg


Is (a) right? And any ideas what could be (b)?
 
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Your A and B columns should show all possible values {00, 01, 10, 11}

The output of the D NAND gate is: A' NAND B = (A' & B)' = D

and the F NAND gate is: A NAND B' = (A & B')'
 
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jedishrfu said:
Your A and B columns should show all possible values {00, 01, 10, 11}

The output of the D NAND gate is: A' NAND B = (A' & B)' = D

and the F NAND gate is: A NAND B' = (A & B')'
You mean I should have four columns?

A1 0101
A2 1010
B1 0101
B2 1010

Like this?
 
No, you still have an A and a B column:

Code:
A   B
--  --
0   0
0   1
1   0
1   1
 
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jedishrfu said:
No, you still have an A and a B column:

Code:
A   B
--  --
0   0
0   1
1   0
1   1
But how did you derive these numbers? My original 0101 in A and B I got from the inverter table. But I don't see how to get the ones you mention.
 
Your A and B inputs can be any binary value so since you have two inputs you have a possibility of 4 input values to the circuit as shown in the table above.
 
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jedishrfu said:
Your A and B inputs can be any binary value so since you have two inputs you have a possibility of 4 input values to the circuit as shown in the table above.
I get it now.

So:
Code:
A   B   G   D   E   F   C

0   0   1   1   1   1   0
0   1   1   0   0   1   1
1   0   0   1   1   0   1
1   1   0   1   0   1   0
 
That's what I got too. The circuit diagram has a symmetry about it which is seen in the truth table.
 
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jedishrfu said:
That's what I got too. The circuit diagram has a symmetry about it which is seen in the truth table.
But what could be said about (b)? No idea about it.
 
  • #10
Look at the A and B inputs and then the C output doesn't that look like some gate you're familiar with?
 
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  • #11
I would say the "final" truth table should include only A, B, and C.
 
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  • #12
jedishrfu said:
Look at the A and B inputs and then the C output doesn't that look like some gate you're familiar with?
AND has 0001 at output
OR 0111
NOR 1000
NAND 1110
Inverter 10

And I have at output 0110. The input is the same for this circuit and for AND, OR, NOR and NAND.
 
  • #15
The truth table for this problem should have three columns - two for A and B inputs, and one for the result C.
 
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