I have the following logic gates:
(A'.(B+C))' which I had reduced to A+B'.C'. I then want use a NAND gate connected to a NOR gate, then connected to an inverted. However, I have been informed that I need not to use ten transistors, and that 8 can get the job done. How exactly can I invert the output after the NOR gate without the addition of new transistors?