Logic gates, inverting output without increasing transistor count

[sandy.bridge]

Homework Statement

Hello all,
I have the following logic gates:
(A'.(B+C))' which I had reduced to A+B'.C'. I then want use a NAND gate connected to a NOR gate, then connected to an inverted. However, I have been informed that I need not to use ten transistors, and that 8 can get the job done. How exactly can I invert the output after the NOR gate without the addition of new transistors?

 

[NascentOxygen]

Can you use an OR gate instead of NOR + NOT?

Otherwise, draw the arrangement you propose using, and you may be able to spot where you can economize on the number of gates.

B'.C' can be converted to a NOR

 

[sandy.bridge]

Thanks, I managed to get it. It was a lot more simple upon developing and then utilizing a truth table.