Logic Gates with XOR gate need to verify solution

In summary: Heh, on yea...that.. as soon as I fix my hair :) Thank youIn X we get b' = 0In Y we get a.b = 1.1 =1In Z we get (b'.(c.d))'=b+(c.d)'=b+c'+d'=1+1+1=1 DeMorgan's Law (a.b)'=a'+b'In N we get (d.d)'=d'=1In P we get b+c'+d'+d'=b+c'+d'=1+1+1=1
  • #1
Femme_physics
Gold Member
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Homework Statement



Basically and most importantly... I wanted to see if I got my F function correct. That's at clause 2.

At clause 3 I'm told

a = b = 1
c = d = 0

and to calculate

At clause 4 I'm asked if the logic value of P is 1, if the logic value of Q matters...

The Attempt at a Solution



http://img528.imageshack.us/img528/4162/annnnswer.jpg
 
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  • #2
What did you get for "p"?
 
  • #3
Hey ILS

I like Serena said:
What did you get for "p"?

To what question? Only in the last question they refer to "P", and I wrote my answer in this scanned paper.
 
  • #4
Femme_physics said:
Hey ILS

Hi :shy:

To what question? Only in the last question they refer to "P", and I wrote my answer in this scanned paper.

In your diagram a point is marked with the letter "p".
The corresponding part in your formula seems a little off.
 
  • #5
In your diagram a point is marked with the letter "p".
The corresponding part in your formula seems a little off.

It's just a point in the diagram, it has no relevance to the formula
 
  • #6
Femme_physics said:
It's just a point in the diagram, it has no relevance to the formula

Your formula contains ##\overline{b}cd + \overline{d}##.
This corresponds to the result of the OR gate "P" on the signals at p and at q, which is ##p+q##.

This means that effectively you have ##p=\overline{b}cd## and ##q=\overline{d}## in your formula.
The expression for q is correct, but the expression for p is not.
 
  • #7
N=Logic NOR
 
  • #8
I like Serena said:
Your formula contains ##\overline{b}cd + \overline{d}##.
This corresponds to the result of the OR gate "P" on the signals at p and at q, which is ##p+q##.

This means that effectively you have ##p=\overline{b}cd## and ##q=\overline{d}## in your formula.
The expression for q is correct, but the expression for p is not.

Sorry I must've missed this post.

Is there any other posts I've missed for over a week?

To reply: I don't think the actual signals in q and p matter at all. Only if they are one or zero. if we know one of them is one, then the other's irrelevant. Doesn't it make sense?
 
  • #9
In part (2) you have not recognized that Z is an inverting gate, it's NAND.
 
  • #11
Femme_physics said:
I don't think the actual signals in q and p matter at all. Only if they are one or zero. if we know one of them is one, then the other's irrelevant. Doesn't it make sense?

but we don't know what they are, as they are dependent on the input, so we can't write either one off as irrelevant. whether or not you care about what the signal is, in order to state that the output of P = /bcd + /d, as you have done in your answer to clause 2, you need to be sure that those equations are correct.
(which they are not, and that has caused you to answer part 3 incorrectly)

(note P the gate ≠ p the signal)

edit: just realized you may be talking about clause 4, in which case you are correct, however I Like Serena was pointing out a mistake in clase 2.
the labels p and q are the signal inputs to the gate P.
 
  • #12
edit: just realized you may be talking about clause 4, in which case you are correct, however I Like Serena was pointing out a mistake in clase 2.
the labels p and q are the signal inputs to the gate P.

Ohhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh!

NOW I understand :)

So let me get back to the first reply :P
I like Serena said:
What did you get for "p"?

That would be
http://img442.imageshack.us/img442/9803/peepee.jpg Ahh...I see :) I forgot a big tag over everything. *smacks forehead*

And now to correct the next question based on that:

http://img855.imageshack.us/img855/1918/abc800.jpg
I like Serena said:
Thanks, I'll get on it :)
 
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  • #13
Femme_physics said:
Ohhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh!

NOW I understand :)

So let me get back to the first reply :P

Ahh...I see :) I forgot a big tag over everything. *smacks forehead*

And now to correct the next question based on that:

All good now.


Thanks, I'll get on it :)

You still seem to have missed the last one!
 
  • #14
All good now.

You rock!
You still seem to have missed the last one!
Heh, on yea...that.. as soon as I fix my hair :) Thank you
 
  • #15
In X we get b' = 0
In Y we get a.b = 1.1 =1
In Z we get (b'.(c.d))'=b+(c.d)'=b+c'+d'=1+1+1=1 DeMorgan's Law (a.b)'=a'+b'
In N we get (d.d)'=d'=1
In P we get b+c'+d'+d'=b+c'+d'=1+1+1=1
In R we get 1+1 , now since inputs are even in number , XORing gives result 0 , i-e f=0
Hope it helps you ...
 
  • #16
Note here you mentioned N here to be NAND , its NOR but for this case the answere will come the same ...
In N we get (d+d)'=d'=1
 

FAQ: Logic Gates with XOR gate need to verify solution

1. What is a logic gate?

A logic gate is an electronic component that performs a logical operation on one or more binary inputs to produce a single binary output. It is the basic building block of digital circuits and is used to process and control logical operations in computer systems.

2. What is an XOR gate?

An XOR gate (Exclusive OR gate) is a type of logic gate that produces an output of 1 (true) only when one of its inputs is 1. If both inputs are the same (both 0 or both 1), the output will be 0 (false). It is commonly used in digital circuits to compare two binary inputs and determine if they are different.

3. What is the purpose of verifying a solution with an XOR gate?

Verifying a solution with an XOR gate is important in digital logic design as it helps to ensure the accuracy and functionality of the circuit. It is used to confirm that the output of the circuit is correct based on the expected output, and can help identify any errors or faults in the circuit design.

4. How do I verify a solution using an XOR gate?

To verify a solution using an XOR gate, you will need to connect the inputs of the gate to the corresponding inputs of the circuit and then compare the output of the gate with the expected output. If the output of the gate matches the expected output, then the solution is verified.

5. Can an XOR gate be used in combination with other logic gates?

Yes, an XOR gate can be used in combination with other logic gates, such as AND, OR, and NOT gates, to create more complex logical operations. This allows for the design of more sophisticated digital circuits to perform a wide range of functions.

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