MOSFET Design Doubt: Explaining Positive Voltage

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In MOSFET design, connecting the substrate terminal to the source can effectively cut off the two pn junctions when the drain is at a positive voltage relative to the source. This configuration typically indicates an NMOS device unless it operates in inverse mode, which is rare. The source and substrate are usually connected, but this connection does not inherently cut off the transistor. Instead, with the substrate connected to the source, the back-to-back pn junctions create a non-conducting path for the drain-source path. In the absence of gate voltage, the enhancement-mode MOSFET remains in a cut-off state.
shawrix
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Can someone explain this sentence in MOSFET design..

The Since the drain will be at a positive voltage relative to the source the two pn junctions can be effectively cut off simply connecting the substrate terminal to source terminal.
 
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As far as I know the substrate and source are usually connected, and does not cut off the transistor in any way.
 
Is it NMOS or PMOS?
 
shawrix said:
Can someone explain this sentence in MOSFET design..

The Since the drain will be at a positive voltage relative to the source the two pn junctions can be effectively cut off simply connecting the substrate terminal to source terminal.

Since the drain is stated to be more + than the source, the device is an NMOS unless the device is operated in the inverse mode, which is almost never the case.

As stated in a previous post, the souce & substrate are usually but not always connected. That connection does not cut off the device.
 
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shawrix said:
Can someone explain this sentence in MOSFET design..

The Since the drain will be at a positive voltage relative to the source the two pn junctions can be effectively cut off simply connecting the substrate terminal to source terminal.

... with the substrate connected to the source, the two back-to-back pn junctions cause the drain-source path to be a non-conducting path. Under these conditions (with the absence of gate voltage) the enhancement-mode MOSFET is in cut-off.
 

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