Engineering PMOS Circuit Problem: Finding Rs and Input Resistance

[DragonChase29]

Homework Statement

Homework Equations

• Id=K*(Vsg-Vth)²
• KVL

The Attempt at a Solution

On part A,
Haven't had much experience with PMOS. Used large signal model, to find Rs.
Equivalent circuit:

We know that Vs=0. That means Vd=-7.5 V. If we say the voltage across Rs is Vdd-Vd, then that voltage is 22.5 V. Used 22.5V/Id and got 7500 ohms.

Used the Id equation to find Vsg to be 7.5 V

Vsg=Vs-Vg, and Vs=0, so Vg=-7.5

Now,we know there are 2 unknowns, so we need 2 equations. The first equation, we used voltage division to be

• -7.5=15*(Rg2/(Rg1+Rg2))

Then, the second equation was using the small signal model. The input resistance was the Parallel between Rg1 and Rg2:

• 3M=((Rg1)^-1+(Rg2)^-1)^-1
• We disregard the 10km because it is so small in comparision

This is where the problem lies. If we continue, then it leads to a value with negative ohms, which is not possible.

Any help is appreciated.

 

[NascentOxygen]

Since the drain is grounded (if we call the lower supply rail = ground, 0V), then source is +7.5V

With the supply being 0V and +15V, there's a mistake if you calculate a DC voltage anywhere here of 22V. Every DC voltage is going to be within 0V...+15V

 

[rude man]

Haven't had much experience with PMOS.

PMOS is same as NMOS except polarities are reversed: Vs > Vd and Vg < Vs in normal operation. You can thus use the NMOS equations, e.g i = K(V_s - V_g - |V_T|)^2.