Question about NOR gates and overflow

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The discussion focuses on developing a minimal NOR circuit to detect overflow by analyzing the sign bits of two n-bit addends (A and B) and their sum (S). It is established that the overflow condition can be determined by examining the most significant bits (MSB) of A, B, and S. Specifically, overflow occurs when the MSB of A and B are the same, but the MSB of S differs. The conversation emphasizes the importance of generalizing the approach for n-bit addends while considering the carry-in input for accurate detection.

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seang
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How do I develop a minimal NOR circuit that detects overflow by examining the sign bits of two addends (A and B) and their sum (S)?

Doesn't this depend on how long the addends A and B are? Is there anyway I can generalize the result to n bit addends?

or perhaps I can just designate one input as 'the carry in', compare the MSB of the two addends and go from there?
 
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I believe the problem requires you to consider only the MSB of A and B, and the sum S of these bits. What are the overflow conditions given these 3 inputs? Work it out from there.
 

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