Question over Coupling capacitors and Op-Amps

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Discussion Overview

The discussion revolves around the role of coupling capacitors in op-amp circuits, specifically addressing their effects on AC and DC signals, noise reduction, and their absence in gain calculations. Participants explore theoretical and practical aspects of circuit design, including impedance considerations and the impact of frequency on circuit behavior.

Discussion Character

  • Exploratory
  • Technical explanation
  • Conceptual clarification
  • Debate/contested
  • Mathematical reasoning

Main Points Raised

  • One participant questions whether coupling capacitors (C1 and C3) cause voltage drops in AC signals due to their blocking of DC.
  • Another participant suggests that coupling capacitors should be large enough to ensure their reactance is low compared to other impedances in the circuit at the lowest frequency of interest.
  • There is a discussion about how capacitor C2 reduces power-supply noise at the op-amp's non-inverting input, with some participants explaining that its impedance is lower than that of resistors R3 and R4 in parallel.
  • Some participants propose that the gain calculation should not include capacitors, while others express uncertainty about when to consider the effects of capacitors on gain and phase shift.
  • One participant notes that if the frequency response of the circuit is plotted down to DC, the capacitors will affect gain and phase shift at low frequencies.
  • Another participant explains the use of a potential divider with resistors to create an artificial ground for a single supply op-amp configuration, emphasizing the role of coupling capacitors in transmitting AC signals.

Areas of Agreement / Disagreement

Participants express various viewpoints regarding the effects of coupling capacitors on AC and DC signals, the role of C2 in noise reduction, and the implications for gain calculations. There is no consensus on the specific impacts of these components, indicating that multiple competing views remain.

Contextual Notes

Participants have not specified the frequency range for the circuit, which may influence the discussion on impedance and gain. The implications of capacitor behavior at different frequencies and the assumptions regarding circuit design are not fully resolved.

Who May Find This Useful

Readers interested in op-amp circuit design, signal processing, and the effects of capacitors in electronic circuits may find this discussion relevant.

KrNx2Oh7
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So this is the op amp I am looking at and I have a few questions, not entirely sure how to ask them, but I'll ask more as I find out more

http://postimage.org/image/i228xrkj7/
http://postimage.org/image/i228xrkj7/

So the capacitor C1 and C3 are used to block DC, but when you add these do you not
get voltage drops in the AC signal? Like when the op amp outputs a voltage does it not drop some voltage across the capacitor before it reaches Vout.

My second question is over C2. Apparently it is suppose to eliminate power-supply noise from reachin ghte op amps noninverting input. I don't see how this works. How does a capacitor in parallel with R4 stop noise, a non-DC signal?

Finally my last question, which might sound silly, but why do capacitors not end up in the Gain. Instead of Gain= -R2/R1, why don't you do the current equations and include -jwC in the transfer function to have capacitors show up in the gain.

silly questions, but I want to know why everything is in this configuration and why it works

thanks
 
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The idea is to use coupling capacitors which are so large that even at the lowest frequency of interest[/color][/color] their reactance is still comparatively much lower than other associated impedances in the circuit.
 
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You haven't told us what frequency range the circuit is designed for, but the idea is the C2 provides a much smaller impedance from the op amp + input to ground than R3 and R4 in parallel.

You could get the same effect by reducing the values of R3 and R4, but then you would be wasting power because of the higher current flowing through them.

Similarly C1 will have a low impedance compared with R1, and C3 compared with RL, so for practical purposes they can be ignored when understanding how the circuit works.

Of course if you plotted the response of the circuit down to DC, the caps will affect the gain and phase shift of the amp at low frequencies.
 
AlephZero said:
You haven't told us what frequency range the circuit is designed for, but the idea is the C2 provides a much smaller impedance from the op amp + input to ground than R3 and R4 in parallel.

You could get the same effect by reducing the values of R3 and R4, but then you would be wasting power because of the higher current flowing through them.

Similarly C1 will have a low impedance compared with R1, and C3 compared with RL, so for practical purposes they can be ignored when understanding how the circuit works.

Of course if you plotted the response of the circuit down to DC, the caps will affect the gain and phase shift of the amp at low frequencies.

Cool that was VERY helpful. Let me see if I understand everything.

C1 and C3 block the DC signal and only drop AC voltage slightly since the impedance is low for the capacitors at higher frequencies (Xc= 1/-jwC)

For C2 it lowers the voltage seen at V+ because it's impedance is also small. And +V is a DC voltage which I assuming is superimposed with a small noisy AC signal. So for DC the capacitor does nothing, but for the noisy AC it reduces what is seen in the V+.

For gain I'm not sure about what you said when u mentioned "plotted the response of the circuit down to DC". When is the gain just -R2/R1 vs when I ...

V+ = V*(R4 || Xc)/ [(R4 || Xc)+R3]
V- = V+
-[Vo - (V-)]/R2 = Vin - (V-)/(Xc+R1)
solve for Vo/Vin


One more thing. Why disnt we just ground the pos terminal
thanks a million
 
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You would normally expect an op amp to have 2 symmetrical power supplies with a common 'ground' or 0Volts...usually +/-15V.
The + input is usually connected to the common ground to establish 0 volts.
Your amplifier is using a single supply which needs to be 'split', the 2 56k resistors act as a potential divider to 'split' the supply. The junction of the 56k resistors is connected to the + input of the amplifier.
This means that the output of the amplifier can increase and decrease symmetrically about an 'artificial' zero. The coupling capacitors play a role in this because
only AC (+/-) are transmitted by capacitors.
 

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