Semiconductor temperature range

[likephysics]

what is the difference between a commercial grade IC and an Industrial grade IC.
Industrial works at a wider temperature range. I am not asking about that.
What is it that you change inside the chip that makes it work at higher temperature ranges?

 

[uart]

what is the difference between a commercial grade IC and an Industrial grade IC.
Industrial works at a wider temperature range. I am not asking about that.
What is it that you change inside the chip that makes it work at higher temperature ranges?

The silicon die itself is usually good to well over 125C, it's usually the packaging that limits the operating temperature. Commercial grade IC's might use cheaper plastic packages where as military grade would use more expensive ceramic or metal packaging.

In addition to packaging there is of course just testing an "binning" to get higher spec grades.

 

[likephysics]

ok. so timing margin(faster transistors) has nothing to do with temp grade.

 

[berkeman]

what is the difference between a commercial grade IC and an Industrial grade IC.
Industrial works at a wider temperature range. I am not asking about that.
What is it that you change inside the chip that makes it work at higher temperature ranges?

ok. so timing margin(faster transistors) has nothing to do with temp grade.

No, timing margin definitely depends on temperature. That is part of what uart was saying.

There are a number of issues with temperature range (or performance over temperature). Here are a few:

** Timing margins -- the speed of CMOS and bipolar transistors change with temperature, and this directly affects interfaces and clock timing margins (in multiple ways).

** Voltage margins -- since the diode voltage depemds on temperature, the voltage drops in things like Zener voltage regulator stages and Vbe drop bias settings change with temperature. For example, if you are comparing the voltage drop across a resistor with a Vbe drop as part of your current limit circuit in a regulator (either linear or switching), that Vbe drop is going to change a lot over the extremes of your operating temperature range. You need to be sure that your current limit is "okay" for the ends of the temperature range (not overly limiting at high temperature, and doesn't let the load blow up at low temperature...)

** Leakage currents change a lot with temperature, so things like DRAM refresh timing, and S/H timing margins, etc., will depend on temperature range specifications.

** Matching of transistors in analog applications is often important (in diff amps, current mirrors, etc.), and the quality of the matching also depends on temperature (and temperature gradients). One of the hardest things to deal with in analog and mixed signal IC design is the temperature gradients that you can get with a power circuit in one part of the die, and a sensitive differential amp circuit in another part of the die -- the temperature gradient across the die due to the power dissipation in the power section plays havoc with the matching techniques that you use in the diff amp section...

** Lots of other issues -- PLL behavior, Xtal oscillator start-up behavior, flash memory endurance and retention, etc...

 

[caffenta]

Temperature also affects reliability. Industrial grade components have to pass more stringent tests.

 

[berkeman]

Temperature also affects reliability. Industrial grade components have to pass more stringent tests.

Certainly I test according to temperature range rating (plus 10-15C outside the published temperature range). Are there other tests that you are thinking of? Not challenging, just curious and asking...

 

[caffenta]

I was just thinking of long-term reliability tests, like accelerated lifetime tests. If the normal operating temperature is higher, the confidence level must be higher.

 

[jsgruszynski]

A couple of things:

For any commercial product, typically there is no difference in the actual silicon or its design between commercial, industrial and military parts. The only difference is where the parts fell out (binned) at the end-of-line quality testing and what the product demand is for any given grade.

And example: when I worked for Intel we had some odd-ball distributions on the parts I worked on. To maximize profits, they invented a new "product grade" that had performance between commercial and industrial ratings because they were getting unusually high fall-outs in testing between these two. They charged extra above commercial but less than industrial for it.

Because you have to spend time and money to do the more extensive testing of higher grades, having a fall out "just before" the qualification for the "next higher" grade cost you money that you never recover (unless you play this trick) - you can sell the parts as the next lower grade because the still exceed that qualification but you've invested as much as the higher grade parts. So they had something called "Express" class for a while which were all those less-than-industrial fall out parts.

For military parts that came from commercial part lines and are tested out, this is called QPL or Qualified Parts List testing. Basically if you can pass the "eye of the needle" of end-of-line testing, you have a mil spec part. This works for man-rated stuff which are generally lower environmental stress (yes, 125C is low stress - we typically do reliability testing at 200C-300C) but generally not how you qualify for "Class S" (strategic/space rated) mil spec.

A classic example of how QPL can fail was a case I "FA-ed" years ago involving a design flaw in a system that accelerated the parts so much that every single one reached end-of-life as a result of the mil qualification testing combining with the flaw. It was discovered just before use but the only work around for aged parts was to never use them. Cost a pretty penny.

So instead you have to qualify the process akin to an ISO qualification (aka QML or Qualified Manufacturer List) - you have to prove you continuously control the processes at each step, not just that you can pass end-of-line testing. This is akin to the parametric process control that is pretty common on commercial lines but more stringent; there is typically more in-depth testing including using reliability testing as a process control parameter. This is where WLR (wafer level reliability) came from originally.

A lot of this parametric device test involves accelerated life testing both on-wafer (WLR) and packaged part (PLR). That's actually how we got our start at http://www.corewafer.com/" - we were on the teams involved in developing these standards and test methods (e.g. the JEDEC WLR test methods). We were involved in military class S design, quality and reliability testing. The Berlin Wall fell, we suddenly needed new jobs and the government sold us all the IP we'd been working with.

The confidence level doesn't improve with temperature. For hard failures, variance is generally worse with temperature because 1) the failures can become more non-centrally distributed (e.g. scale-free distributions have been used for end-of-life modeling with some success) and 2) the failure mechanism tends to change with greater acceleration.

Think of a piece of paper - a little heat, like in a desert, will accelerate aging slowly because the oxidation rate is gradually accelerated. Classic Arrhenius acceleration. Increase the temperature beyond, say, 451F (kindling temperature of paper), the aging and failure mechanism changes radically - you are burning - still oxidation but not comparable to the slower process (though often correlatable), and also now it's an "active", "feedback-driven" form of oxidation whose speed and time-to-completion (to failure) can vary radically with small parameter changes ("flap of a butterfly wing creates a hurricane").

Only adding more parts (and more points of stress acceleration) improves statistical confidence. This is part of why we have parallel test products - test more parts in parallel gives you greater statistical significance in the same test-time interval and at different stress levels. Better data due to larger numbers and due to more curve fit points for the life-time curve (each stress condition only provides a single point for the fit - which is an exponential fit minimally requiring at least 3 points over 3 orders of magnitude time).