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SR Latch problem

  1. Sep 16, 2008 #1
    -NOTE: I figured the problem out. Please ignore.

    Draw a similar latch using NAND gates (from one using NOR gates). Derive its characteristic table and show its timing diagram, given the R and S inputs.

    S R Qa Qb
    0 0 0/1 1/0 (no change)
    0 1 0 1
    1 0 1 0
    1 1 0 0

    3. The attempt at a solution

    I just replaced the NOR gates with NAND gates and did the characteristic diagram. Though the solution in the book complements the S and R inputs and switches the Qa and Qb outputs. I'm not sure why they do this, but can only assume by "similar" they mean to draw using NAND gates and have the same outputs as the NOR gate latch. So is there is a reason why you would complement the inputs and switch the outputs? If I need to scan in the circuit drawing, please let me know.
    Last edited: Sep 16, 2008
  2. jcsd
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