Trouble in implementing dual supplies with battery in circuit

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Discussion Overview

The discussion revolves around the challenges faced in designing a circuit that utilizes a resistor divider and a buffer connected to a data acquisition (DAQ) system. Participants explore issues related to voltage output, impedance, and circuit configuration, particularly in the context of using dual supplies with batteries.

Discussion Character

  • Technical explanation
  • Debate/contested
  • Experimental/applied

Main Points Raised

  • One participant describes a circuit designed to reduce a high input voltage to a smaller output voltage but encounters issues with the positive half of the voltage being cut off.
  • Another participant notes that the simulation diagram shows the output grounded, which may contribute to the observed issues.
  • Concerns are raised about the input impedance of the LT1010 buffer chip, suggesting it may not be suitable for high impedance drivers.
  • Suggestions are made to use an ordinary op-amp to achieve a lower output impedance, as the LT1010 may not perform adequately under certain conditions.
  • Participants discuss the impact of input current on the bias point of the circuit, proposing capacitor coupling and resistor adjustments to mitigate this issue.
  • Questions arise regarding the necessity of using both an op-amp and a buffer versus just using an op-amp alone.
  • Discussion includes the importance of load impedance on the output voltage and the potential benefits of using an instrumentation amplifier for its high input impedance.
  • Participants consider capacitor values for bypassing and coupling, with suggestions for typical sizes based on circuit requirements.

Areas of Agreement / Disagreement

Participants express multiple competing views regarding the best approach to resolve the circuit issues, particularly concerning the use of different components and configurations. The discussion remains unresolved as various hypotheses and suggestions are presented without consensus.

Contextual Notes

Limitations include the dependence on specific component characteristics, unresolved questions about the optimal configuration for the circuit, and the need for further testing to validate proposed solutions.

Who May Find This Useful

Readers interested in circuit design, particularly those working with signal conditioning, impedance matching, and dual supply configurations in electronic systems.

iqjump123
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Hello all.

I am in the process of designing a circuit that involves a resistor divider that connects to a buffer to be connected to a DAQ system. This circuit is being made because the input voltage coming in will be in the range of tens of volts, and what I want is a smaller Vpp wave.

Attached is a pdf of the circuit I built and the simulation results.

When I physically build the circuit, I get the correct voltage but without the positive half of the voltage- so it looks like the positive half of the voltage is cut off. It seems that it has to do with the voltage rails, but I checked my circuit to make sure and even replaced the battery pair with new ones, with no avail.

I am using an LT1010 buffer chip, and the voltage divider ratio was 1/4, down to a quarter.
Since this response when I built it didn't make sense, I simulated the circuit using spice orcad. The second picture in the pdf shows the results. As you can see, the divider voltage is virtually none, and the output isn't even showing anything. I presume adding a load resistor on the output of the buffer will show something, but nonetheless, the output from the resistor divider should show a tuned down voltage of 1.25Vpp sin wave (since vin was 5vpp) , and without a DC offset.

My guess is that it has something to do with how I position my virtual ground from the dual supply and the supply of all the other devices, but I am lost at this point.

Thanks in advance!

iqjump123
 

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The simulation diagram shows the output grounded.
 
The input impedance of this chip would be a problem with high impedance drivers.

The input is just an open base of a PNP transistor, which means that base current has to flow in the external circuit. This current is about 75 uA.

The data sheet says that the input is not high impedance and Linear's own simulator indicates an impedance of about 15 K.

So, maybe you could use an ordinary opamp and follow it with this circuit if you need a really low output impedance.
 
vk6kro said:
The input impedance of this chip would be a problem with high impedance drivers.

The input is just an open base of a PNP transistor, which means that base current has to flow in the external circuit. This current is about 75 uA.

The data sheet says that the input is not high impedance and Linear's own simulator indicates an impedance of about 15 K.

So, maybe you could use an ordinary opamp and follow it with this circuit if you need a really low output impedance.

Hey vk6kro,

Thanks very much for your input.

as with the simulation, yes, I did put in the load resistor- though it still is giving me an inconsistent result- now the resistor divider output gives the correct results, but the output of the buffer amp in the simulation is a flat line on -9V.

So I can also try routing the part with an ordinary opamp to try to circumvent this problem. However, I think there are more problems to my circuit than just the impedance problems to show the entire output omitting the positive half of the cycle completely. After all, the lower half of the voltage output is generated accurately.

thanks!
 
The main problem is that there is 75 μA flowing out of the input pin and this will shift the bias point by several volts if it is not allowed for.

If you are only going to use an AC signal, then you could put 120 K from the input pin to the negative 9 volt rail, then capacitor couple the input signal to the input of the chip.
 
vk6kro said:
The main problem is that there is 75 μA flowing out of the input pin and this will shift the bias point by several volts if it is not allowed for.

If you are only going to use an AC signal, then you could put 120 K from the input pin to the negative 9 volt rail, then capacitor couple the input signal to the input of the chip.

Oh wow. So the input current can be the result huh. Thanks for the insight.
The inputting signal, actually, will be something in the lines of a DC ring down voltage (so a sin signal that can range up to 30V that deteriorates with time- around 5 ms). The sin voltage in the simulation was just as a test signal to see how my circuit will react.

My plan currently is to install bypass capacitors on both rails, capacitor coupling the input signal to the input of the chip (what value should i use? would common nF caps work that are used in bypass caps for voltage rails?) and putting the output of the resistor divider through a ua741 opamp (in unity gain of course) and then attaching a buffer on that.

Couple questions- would it really make that much of a difference in terms of the change in output impedance of my circuit by using both the ua741 and the buffer, or should i just use the ua741?

Second question- does the virtual ground created from using two 9V batteries to create the dual supply be connected to the common ground connected to the entire circuit? (such as to the resistor divider, input signal, output signal, etc)

thanks for your continued help in this matter.
 
It depends on what sort of load you will be driving.

The LT1010 has an output impedance of about 30 ohms, meaning the output will drop to half if you put a 30 ohm load on it.
Smaller values of load resistor would drop the output more, of course.

A generic Opamp in LTSpice could drive 5 ohms without any drop in voltage but only if it wasn't driven into distortion. So, you get reduced output. It was in unity gain mode with 100% feedback.

Into 30 ohms as a load, the LM1010 could produce 7 volts peak to peak (limited by the 9V batteries) while the generic opamp could only produce 0.7 volts peak to peak before distortion. So, it works OK.

Try an opamp and see if you need the buffer. There are various circuits in the data sheet for the LT1010 which combine the chip with other drivers.
On its own it has too many problems.

Capacitor sizes for the rails would be around 10 uF. You would have to choose the input capacitor based on the circuit components and the frequency. 1 uF would be typical.
If you can use capacity coupling, then you probably don't need split supplies. LM324 chips allow single supply operation as do most opamps.

If you have a split supply, then the junction of the two supplies would be connected to the ground for the circuit.
 
Hey vk6kro- thanks for the further information.

Upon evaluation of the circuit, I decided to not use the buffer and instead use an instrumentation amplifier for its high input impedance and low cmrr, and it indeed took care of the bias problem.

Thanks very much for your help.
 

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