Understanding an integrating ADC

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Core2uu
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http://www.hardwaresecrets.com/imageview.php?image=3740

Referencing the above image, I have a few a questions.

1) I think CLK means clock input; does CLR perhaps mean clear?
2) What exactly is the role of the output buffer?
3) I'm confused as to how the control logic exactly functions and what components it would be constructed from. I'm not looking to use an MCU.
 
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Oh, and here's the image.
Block diagram of a dual-slope integrating ADC: Vin and -Vref feed a switch, resistor and integrator op-amp with feedback capacitor, then a comparator, Control Logic, an n-bit Counter with CLK and CLR inputs, and an Output Buffer driving outputs Dn through D0.
 
You can find an alternate description of this circuit here.
http://www.allaboutcircuits.com/vol_4/chpt_13/8.html

clk is clock and clr is clear.

the output buffer holds the result of the conversion and shields the down stream digital from the act of counting.