Understanding Clock Counter Complementing in Digital Circuits

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Clock counter complementing in digital circuits involves a sequence where each flip-flop (FF) toggles based on the output of the preceding FF. The first clock pulse increments the first FF from 0 to 1, and subsequent pulses toggle the outputs, creating a cascading effect. This means that the output of one FF serves as the clock input for the next higher significant bit FF. Understanding this cascading mechanism clarifies how the counter transitions through all binary states, rather than jumping directly from 0000 to 1111. The discussion highlights the importance of the clock pulse sequence in achieving accurate counting in digital circuits.
transgalactic
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i understood that each time a digit complements
and complements the next digit etc..
but i can't see how it works
because if its truee then from the 0000 state
by one pulse we will have 1111

i can't ubderstand how we get the numbers between

here is circuit
http://img146.imageshack.us/my.php?image=img86761zw2.jpg
 
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No, the first clock pulse increments the first FF 0-->1, then the next clock pulse toggles the output of the first FF 1-->0, and that falling edge is the clock edge to the 2nd FF. So the 2nd clock takes the output from 0001--> 0010.

The key here is that the output of on FF feeds the next higher significant bit FF. Do you see that now?
 
oohh ok i am starting to see it
 
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