Understanding the Use of Comparator for Digital Integrator

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The discussion revolves around building a digital integrator using an up/down counter and the role of comparators in the circuit. Participants highlight the challenge of managing overflow in the accumulator and the need for incremental output to prevent rapid overflow. The integration of a sine wave signal through an 8-bit ADC is discussed, emphasizing the importance of proper biasing and AC coupling to avoid infinite integration. Clarifications are made regarding the purpose of the up/down counter, which integrates a +1, -1 input signal, and the mathematical implications of the sine wave's frequency on the accumulator's behavior. Overall, the conversation focuses on the design complexities and necessary adjustments for effective digital integration.
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delonboard said:
I am trying to build a digital integrator as specified on this thread. I do not understand the use of comparator in the circuit. Can anyone explain?? maybe the original poster. I am new to this .
The original poster last logged-in in 2008 so it is probably wishful thinking that OP may reply. @nokeeauser

Perhaps one of the other participants might see your post.

In which of those files is the comparator shown?
 
Forget about the link to that post. This is my design for 4 bit digital integrator. I will cascade two of the parts for 8 bits which is what i need. My problems:
The sum overflows too fast. According to the problem i have to implement incremental output which can be implemented with the carry out of the integrator. I am not sure how to get it. It says to use combination logic.
 

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I'm a little confused by what I see. (but that happens a lot)

A counter that counts up and counts down is essentially an integrator of a +1, -1 input signal. I'm not sure what you are going for with the accumulator following it.

The counter is integrating, and the accumulator is integrating that.

You basic question about cascading up/down counters is answered by figures a, b, and c in this datasheet. (three different methods, b is probably what you want)
http://www.futurlec.com/74LS/74LS191.shtml

Explain a little more. Generally one starts with an idea of the range of numbers they want to deal with and then size the counters and accumulators accordingly.

You may want a clear and an enable function also.
 
I want to have a sine wave analog input that gets converted into digital by 8 bit ADC. The signal is passed through integrator to get cosine output. If i directly pass the digital signal through accumulator, the adder will overflow very fast. So i should implement incremental input and output. I do not understand how to implement it. what do i do with the output from ADC? I was thinking i would compare current output of ADC with previous output and determine if i should count up or count down which is my incremental input but i do not know if that is right as well. And how would i get incremental output?? Sorry if you cannot understand. I can elaborate more. Let me know if you have any questions @meBigGuy. Thanks for replying.
 
I've never done what you are trying to do. Is it just an "academic" exercise, or is there an application of some kind?

I don't understand the purpose of the up/down counter in your design. It has nothing to do with integrating a sine wave. It is creating a triangle wave which you are then integrating with your accumulator (the register and adder)

An 8 bit A/D can represent a sine wave with and amplitude of +127 to -128. But, to get that you need to have 0000_0000 represent 0V, 0111_1111 represent max positive and 1000_0000 represent max negative. You just apply that to the accumulator (which is an integrator). You need to AC couple the sine wave into the A/D and bias it at mid scale. But, any offset will integrate to infinity. (most DSP applications think of the A/D as fractional values)

Think of accumulating a square wave that is +127 half the time, and -127 the other half. What will be the peak value in the accumulator? It will depend on the sample rate and frequency of the input. It will ramp to a max, and then back to the min. (BTW, your up/down counter is doing exactly that, integrating a +1, -1 input signal.). But, if there is any error in the dutycycle, it will ramp to infinity.
 
Mathematically, the amplitude of the integral of a sine wave depends on the frequency. So that makes it difficult to size the accumulator.

58491280958dc0e4042f3cf47f6b6c7a.png


Now, in reality you are doing this in the Z domain (accumulator function is 1 + z(-1)) , but the basic idea is the same. "a" will depend on the sample rate and sinewave frequency.

Acc1.gif
 
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