Voltage offset differential amplifier

Click For Summary

Discussion Overview

The discussion revolves around the simulation of a differential amplifier using LTSpice, focusing on issues related to voltage offset, component models, and circuit design choices. Participants explore both MOSFET and BJT configurations, as well as the implications of various design decisions on the amplifier's performance.

Discussion Character

  • Exploratory
  • Technical explanation
  • Debate/contested
  • Mathematical reasoning

Main Points Raised

  • One participant seeks basic MOSFET and BJT models for simulation, similar to the 1N4148 diode.
  • Another suggests that the drain of M1 should match the voltage of M2 and recommends using a dual matched pair of MOSFETs.
  • A participant expresses a desire to minimize the number of resistors in the design, questioning the source of the significant voltage offset in their circuit.
  • Concerns are raised about the accuracy of the LTSpice simulation results compared to textbook values, with a specific model for NMOS transistors provided.
  • One participant attributes the DC offset to channel length modulation effects, suggesting adjustments to the positive supply voltage to equalize drain potentials.
  • Another participant notes that the amplifier is operating in open loop and questions the reference point for measuring the DC offset.
  • Discussion includes the role of bypass capacitors in multistage op-amps and whether DC components are maintained across stages.
  • Clarification is provided that negative feedback is typically used to set DC conditions in such circuits.
  • Participants discuss the adequacy of the NMOS model used in simulations, with one confirming that it produces expected results under certain conditions.
  • One participant encounters unexpected current values in their circuit and receives advice on correcting transistor designations in the simulation.

Areas of Agreement / Disagreement

Participants express various viewpoints on the causes of the voltage offset and the effectiveness of different models and configurations. There is no consensus on the best approach to resolve the issues presented, and multiple competing views remain regarding circuit design and simulation accuracy.

Contextual Notes

Participants mention potential limitations in the models used and the effects of channel length modulation, which may not be accounted for in all theoretical frameworks. The discussion also highlights the importance of feedback mechanisms in amplifier design.

Who May Find This Useful

This discussion may be useful for electronics students, hobbyists working with differential amplifiers, and professionals interested in circuit simulation and design challenges in LTSpice.

Frank-95
Messages
51
Reaction score
1
Hi all!

I am trying to simulate a differential amplifier in LTSpice but I'm having some troubles.
First, I would like to know if you could suggest me some "basic", scholastic, MOSFET and BJT model, like the 1N4148 for diodes.

Secondly I designed this:
0j6aGh6.png


Practically when I get the drain output I have a big amplification but with a HUGE DC offset: 12 volts about!
Do you know why?Did I mistaken somehitng?

Moreover I don't remember a thing from my electronics studies: should R1 be linked to ground or to V1?

Thank you very much
 
Engineering news on Phys.org
Perhaps it's better this way
DifferentialM.PNG

― the drain of M1 ought to be kept at the same voltage as M2.

It's better to use a dual matched pair of MOSFET in one package as M1 and M2.
 
Last edited:
Your solution makes sense, I have some thoughts though:
First, I would like to use as less resistors as possible, like if it was an IC amplifier.
Secondly, I would like to know why my circuit offsets the voltage so much. This is basically the easiest form of differential amplifier, so there must be a problem I cannot recognize.

9s7y7ra.png


This is from the Sedra-Smith; as as you see I replaced the current source with the mirror, but the offset is still there.

What I think is that there is some problem either with transistors model, or ltspice itself. In fact I simulated an exercise from Sedra-Smith:

gC8bBlY.png


Which results are Rd=5k and Rs=3.25; and LTSpice gives different values for Id and Vd! The model I used is:

.model M1 NMOS(Vto=0.7 Kp=100u L=1u W=32u)

Is the model wrong?
 
It may well be the channel length modulation effect (neglected in the textbook but not in LTspice) to blame. In ICs, MOSFETs with very low channel modulation must be used, otherwise all the mirrors would work wrong. With your differential amplifier, I would first try to decrease the positive supply so as to make the drain potentials (left and right) equal when both the inputs are grounded.
 
Frank-95 said:
Practically when I get the drain output I have a big amplification but with a HUGE DC offset: 12 volts about!
Do you know why?Did I mistaken somehitng?
You are operating the amplifier in open loop. What are you measuring the huge DC offset voltage relative to.

Frank-95 said:
Moreover I don't remember a thing from my electronics studies: should R1 be linked to ground or to V1?
Ground will be quieter and heat the resistor half as much.
 
Your output voltage, (drains of M2 and M6 ?), is centred about +12 volt above ground because that is the voltage on the drain of M5, (and on the gates of the symmetrical p-channel mirror).
 
  • Like
Likes   Reactions: Frank-95
Baluncore said:
Your output voltage, (drains of M2 and M6 ?), is centred about +12 volt above ground because that is the voltage on the drain of M5, (and on the gates of the symmetrical p-channel mirror).

Oh right, my bad, that is the bias point; I've avoided that bypassing the output with a capacitor. But now an abvious questions arises: in real multistage opamp, where the output of one stage is the input of the next stage, is the dc component kept in each stage, it doesn't seem so to me, does it? Moreover, even if it does, is the output always bypassed with a capacitor in real cases?
 
As pointed out by Baluncore we never use this type of circuit without some sort of a negative feedback to "set" DC conditions.
Frank-95 said:
Which results are Rd=5k and Rs=3.25; and LTSpice gives different values for Id and Vd! The model I used is:

.model M1 NMOS(Vto=0.7 Kp=100u L=1u W=32u)

Is the model wrong?

No, your model is just fine. I for Rd = 5k and Rs = 3.25k get Id≈400μA in LTspice
You can also use this model
.model n VDMOS (Vto=0.7 Kp=3.2m)
 
Here is an output stage added to the differential front end.
Attached is an LTspice file diff-amp.asc. Remove the .txt extension to view or run it.
 

Attachments

Last edited:
  • #10
Jony130 said:
No, your model is just fine. I for Rd = 5k and Rs = 3.25k get Id≈400μA in LTspice
You can also use this model
.model n VDMOS (Vto=0.7 Kp=3.2m)

CbL4JyA.png


Oh I don't know, this circuit keeps on yielding 54 uA :/

Baluncore said:
Here is an output stage added to the differential front end.
Attached is an LTspice file diff-amp.asc. Remove the .txt extension to view or run it.

Thank you very much, I got your point :)
 
  • #11
Frank-95 said:
Oh I don't know, this circuit keeps on yielding 54 uA :/
Change NMOS name into M1 . Upper M1 is a transistor designation number not the sim MODEL.
 
  • Like
Likes   Reactions: Frank-95
  • #12
Thank you, got it!
 

Similar threads

DC input random offset voltage for diff. amplifier with current-mirror load
  • · Replies 2 ·
Replies
2
Views
2K
Mosfet SSR, flyback shunt/crowbar safety circuit
  • · Replies 1 ·
Replies
1
Views
2K
Heavy Amplifier Circuit Oscillation Happened
  • · Replies 3 ·
Replies
3
Views
3K
DC Blocking Capacitor: Solving a Photodiode Circuit Problem
  • · Replies 24 ·
Replies
24
Views
4K
Class A Amplifier Sinusoidal Input/Output Relation
  • · Replies 3 ·
Replies
3
Views
4K
Trouble with getting AM receiver to work
  • · Replies 29 ·
Replies
29
Views
5K
Electronically divide voltage signal (sim to differential amplifier)
  • · Replies 20 ·
Replies
20
Views
5K
Trouble understanding common-emitter amplifiers
  • · Replies 17 ·
Replies
17
Views
4K
DC to DC boost converter malfunctioning
  • · Replies 9 ·
Replies
9
Views
4K
Engineering Why is a differential amplifier considered the same as a subtractor?
  • · Replies 1 ·
Replies
1
Views
2K