Why Does Pspice Simulation Stop Working and Show Gray Voltage Markers?

[ernd59]

Hi,

I have a strange problem with Pspice, it always shows after successful attempts, the simulation program stops working and all voltages markers turns to gray and can't see any results any more

 

[berkeman]

What happens if you simplify the output circuit to just a single stage of the multiplier?

Also, what does it mean on the left where it says L1=L1, L2=L2, L3=L3?

 

[ernd59]

What happens if you simplify the output circuit to just a single stage of the multiplier?

it works, but as soon as i copy past some diodes (i change the name and the number of of course) i get this problem,

Also, what does it mean on the left where it says L1=L1, L2=L2, L3=L3?[/QUOTE]

that's an alternative way how a transformer is built in pspice

 

[Baluncore]

Can you attach the ascii node source file to a post. Then I can run it without having to start from scratch.
Pspice has some bugs. Have you tried to run it on LTspice?

 

[ernd59]

Can you attach the ascii node source file to a post. Then I can run it without having to start from scratch.
Pspice has some bugs. Have you tried to run it on LTspice?

no i did not :/

 

[Baluncore]

There is no circuit in that file.

** Profile: "SCHEMATIC1-sim0" [ C:\Users\Student27\Desktop\Pspice versuche\z wie z-schematic1-sim0.sim ]

** Creating circuit file "z wie z-schematic1-sim0.sim.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS

*Libraries:
* Local Libraries :
* From [PSPICE NETLIST] section of pspiceev.ini file:
.lib "nom.lib"

*Analysis directives:
.TRAN 0 100ms 0
.PROBE
.INC "z wie z-SCHEMATIC1.net"

.INC "z wie z-SCHEMATIC1.als".END

It should have one line per component that specifies nodes component name and value/model. For example; C3 is connected between ground node 0 and another node, maybe 3, it is called C3 and has a value of 1nF.
0 3 C3 1n

 

[ernd59]

There is no circuit in that file.

sorry

 

[Baluncore]

Not useful. Please look in the file before you post it to verify it is the raw spice node code.

 

[ernd59]

Not useful. Please look in the file before you post it to verify it is the raw spice node code.

sorry but i found nothing with that format

 

[ernd59]

sorry but i found nothing with that format

 

[berkeman]

sorry but i found nothing with that format

In PSPICE, is there an option to Export a SPICE Deck? That would be the ASCII file that we can try to run ourselves.

 

[tfr000]

Try shorting the caps with a high-ish value resistor - like 1 meg or 10 meg.
SPICE goes a little unstable sometimes when you have a long capacitively coupled circuit like that.

 

[berkeman]

I just noticed that C3 and C13 appear to be shorted in the schematic. That may not be the cause of your problems, but you should fix that connectivity at some point.

 

[ernd59]

In PSPICE, is there an option to Export a SPICE Deck? That would be the ASCII file that we can try to run ourselves.

i have a trial version of Pspice, i can't :(

 

[ernd59]

I just noticed that C3 and C13 appear to be shorted in the schematic. That may not be the cause of your problems, but you should fix that connectivity at some point.

ok thanks

 

[ernd59]

Try shorting the caps with a high-ish value resistor - like 1 meg or 10 meg.
SPICE goes a little unstable sometimes when you have a long capacitively coupled circuit like that.

ok , I am going to try it

 

[Baluncore]

I used LTspice.

 

[ernd59]

I used LTspice.
View attachment 88478 View attachment 88479

it works now

, but how did you manage to get the 2kv ?

 

[Baluncore]

I think it might depend on how you define the driving voltage.
For sine 12V, LTspice generates; V = 12 * sine(wt) i.e. 24 Vpp = 8.5 Vrms. What does Pspice do ?

You run at 500 kHz, I run at 1kHz. Neither has any load so we are both looking at electrostatic voltage.

You show 8 testpoints on your schematic, but you only show 7 traces on the plot.
Your highest output voltage is not being displayed. Has the EHT shorted another of your capacitors or diodes ?

 

[ernd59]

hi,

im using Ltspice now :), I am trying to use C19 as Dummy load ( from the german word Ersatzlast) but it does not work

 

[Baluncore]

Attached is my LTspice Vmult3.asc file. Remove the .txt suffix to run it.
You can attach your .asc by adding a .txt suffix.

 

[Baluncore]

It will take 500,000,000 cycles of your oscillator to charge the C19 = 500uF through 1pF multiplier capacitors.
At 1.5MHz that will take 333.4 seconds, well over 5 minutes.
Your simulation runs for 1 millisecond which is why it does not appear to work.

 

[ernd59]

It will take 500,000,000 cycles of your oscillator to charge the C19 = 500uF through 1pF multiplier capacitors.
At 1.5MHz that will take 333.4 seconds, well over 5 minutes.
Your simulation runs for 1 millisecond which is why it does not appear to work.

thanks :), i need C19 to be charged in less than 15 sec , if i put a 35 MHz it schould works right ?

 

[Baluncore]

i need C19 to be charged in less than 15 sec , if i put a 35 MHz it schould works right ?

Probably NOT.
It will be difficult to simulate that with any version of spice. 15 seconds at 35MHz is 525 million cycles. It will take hours to simulate.

You have not specified the design constraints. What output voltage do you need ?
You have not explained why your transformer ratio is what you have selected.

It was a wise move to convert to a single phase multiplier, as it needs only 50% the number of diodes and uses 33% less caps, and it only requires twice the frequency.

In your previous circuit you showed one diode only as an MMSD4148. What diodes are you really using ?
Are you building an IC ? That is the only way I can see you using 1pF capacitors.
Your 1pF capacitors have a similar capacitance to 1N4148 diodes. That is really not good.

1nF capacitors are available that are both small and cheap.
The bigger the pump capacitors the lower the frequency needed to pump the charge.

You keep changing the circuit without justification.
If you have an LTspice.asc file please post it so I can run and modify it without a waste of time.

The Villard Cascade, voltage multiplier is probably not now the best choice for HV generation.
What is your application. Are you building a taser or a cattle prod ?

 

[ernd59]

Probably NOT.
It will be difficult to simulate that with any version of spice. 15 seconds at 35MHz is 525 million cycles. It will take hours to simulate.

You have not specified the design constraints. What output voltage do you need ?
i need a 2 kv output
You have not explained why your transformer ratio is what you have selected.
It was a wise move to convert to a single phase multiplier, as it needs only 50% the number of diodes and uses 33% less caps, and it only requires twice the frequency.
In your previous circuit you showed one diode only as an MMSD4148. What diodes are you really using ?
Are you building an IC ? That is the only way I can see you using 1pF capacitors.

my final goal is to build a compact defibrillator (i just started ), i wanted to build voltage multiplier using only the smallest component possible that´s why I am using 1pF capacitors, right now I'm just exploring the limits, (how small can i get but still i need to have reasonable results)

Your 1pF capacitors have a similar capacitance to 1N4148 diodes. That is really not good.
i edited the diode now they have reverse 3kv voltage

 

[Baluncore]

Design strategy. What output voltage do you need ?
What output charge in coulombs do you need ?

What HV switch will you use to trigger the discharge ?

Charge pump ladders are used when capacitor and diode breakdown voltages are less than the final output voltage.
The reservoir side of the ladder is then used as the output storage capacitor. The other side is the pump.
By proposing 3 kV diodes you show you have not understood the advantage of the ladder multipliers.

If you have a transformer then why not wind it for the highest possible voltage.
Or better still, go for a two transistor self oscillating inverter with a HV transformer and rectifier.
Or the modern approach, a switching boost converter.

Capacitors come in different form factors. Terminal separation limits voltage.
If you select a surface mount form you should be able to get an optimum (voltage * capacitance) product.
A 1 pF capacitor is usually the same size as a 1nF capacitor because of the standardised packaging.

Where are you going to find a small 500uF capacitor that is rated at 2 kV ?
A single standard capacitor would actually be 470 uF. It would need to be rated at 2 kV.
Two 1000uF caps in series would be possible. Each would be rated at 1 kV
Six 3300 uF caps in series would give 550 uF. Each would be rated at 350 V.
So a six stage multiplier is a possibility.

The transformer would need an increased voltage ratio that had Vpp = 330 V.
With LTspice, 12 V is Vpp = 24. Transformer turns ratio will need to be 330 / 24 = 13.75
That will need an inductance ratio of 189 for the transformer.
You also need to turn your transformer back into a single secondary to make the new ratio clear.

There is little point in attaching a .asc file if it has not been updated to use sensible capacitors and your selected diodes.
Document your design requirements on the spice simulation schematic.

Your attempts at circuits show that you need to study the real component parts catalogues more.
You should also look at how others have designed defibrillators.