AMD64 why only 8 new GPR and not 16 or 32?

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x86 architecture is recognized for its limited number of general-purpose registers (GPR), initially featuring only 8. AMD64 enhances this by doubling the GPR count to 16, while many RISC architectures, like PowerPC, utilize 32 GPR. This raises questions about why AMD did not further increase the GPR count to 32 or 64. The same inquiry applies to SIMD registers, where the increase from 8 to 16 could have been expanded to 32 or 64. Itanium processors, known for their specialized design, boast over 100 registers, highlighting a significant difference in register architecture compared to AMD64, which operates under a 64-bit width in long mode.
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x86 is known to be register-starved, with only 8 GPR

AMD64 extends x86 8 GPR's to 16GPR. Many RISC such as PowerpC uses 32 GPR, which makes me wonder why AMD didn't extend the registers to 32 or even 64 total GPR
(same can be said for SSE, from 8 to 16, why not 32 or 64?) Itanium has over 100
 
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I thought AMD64 ISA under "long mode" with register extensions has a GPR width of 64.

As you prolly know the Itanium is a specialized processor that in itself can cost several hundred dollars.
 

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