Propagation delay for carry lookahead adder

AI Thread Summary
The discussion focuses on calculating the maximum propagation delay for a carry lookahead adder. For an 8-bit parallel adder without carry lookahead generators, the maximum propagation delay is suggested to be 8 units. When considering a 16-bit adder with carry lookahead generators, the propagation delay would depend on the specific design and the number of levels of lookahead logic used. Participants are encouraged to explain their reasoning and calculations instead of just providing answers. The emphasis is on understanding the propagation delay in relation to the adder's architecture.
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Homework Statement



1) I'm using a 4 bit carry lookahead adder to build a 8 bit parallel adder. I'm to calculate the maximum propagation delay time, assuming each gate introduces a unit time of propagation delay. I'm assuming not carry lookahead generators.

Would it just be 8 units of propagation delay?

2) If I had a 16 bit adder using carry lookahead generators, what would the maximum propagation delay time, assuming each gate introduces a unit time of propagation delay.

Thanks
 
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