ahmedbadr
- 27
- 0
my question is about capacitor response to ac voltage source .
if we have circuit consistst of ac voltage source and a capacitor .so the variation of voltage across capacitor versus time will be as shown in the attached drawing.
and from this drawing i see that during the postive half wave ,as source voltage increasing ,voltage across capacitor also increasing (charging) and when source voltage decreasing to zero ,voltage across capacitor also decreasing (discharging).is my explanation about this is right??
my next question if this concept is right so why clamper circuit it shows that during positve half cycle when diode is short cicuit the cpacitor is charged to the peak voltage ?
we can see that in the link below
http://www.visionics.ee/curriculum/Experiments/Clamper/Clamper1.html
i hope u get my question
if we have circuit consistst of ac voltage source and a capacitor .so the variation of voltage across capacitor versus time will be as shown in the attached drawing.
and from this drawing i see that during the postive half wave ,as source voltage increasing ,voltage across capacitor also increasing (charging) and when source voltage decreasing to zero ,voltage across capacitor also decreasing (discharging).is my explanation about this is right??
my next question if this concept is right so why clamper circuit it shows that during positve half cycle when diode is short cicuit the cpacitor is charged to the peak voltage ?
we can see that in the link below
http://www.visionics.ee/curriculum/Experiments/Clamper/Clamper1.html
i hope u get my question
Attachments
Last edited by a moderator: