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Choosing current direction for nodal analyses

  1. Aug 12, 2014 #1
    Okay, so I'm working linearly through Fundamentals of Electric Circuits and this is a practice problem.

    1. The problem statement, all variables and given/known data
    Obtain the node voltages in the circuit.
    http://i2.minus.com/iJPUlZbuy0mLa.jpg [Broken]

    The answer is -6 volts for node 1 and -42 volts for node 2. (Which I checked in a simulator.)

    2. Relevant equations
    Not really... Well, i = v/R I guess.

    3. The attempt at a solution
    Okay, the first step is looking at each node and labelling currents going in and out and using Kirchhoff's current law: the sum of currents flowing into a node equals the sum of currents flowing out of that same node. I am under the impression that I can choose the directions of unknown currents freely, and that if I got them the wrong way then I'll just get a negative current.

    So, why not say that for node 1, current flows in from the source and in from the 6 Ω resistor, and out from the 2 Ω resistor? (→↓←) So 3 + (1/6)v2 + (1/6)v1 = (1/2)v1, or 3 = (1/2 - 1/6)v1 + (-1/6)v2. Meanwhile, for node 2, current flows out towards the source, out towards the 6 Ω resistor, and in from the 7 Ω resistor. (←↑→) It works out to 12 = (1/6)v1 + (1/7 - 1/6)v2.

    The section introduces using Cramer's method to solve for the unknown voltages here, so I did just that and got 97.2 volts and 176.4 volts. Which obviously is not -6 and -42.

    Repeating the process varying the directions of the currents gave different answers. 1:(→↑→) 2:(→↑→) gave 54 and -126. 1:(→↑→) 2:(→↓→) gave 8.18 and -34.36. 1:(→↓→) 2:(→↑→) gave 162 and 630.

    Only 1:(→↓→) 2:(→↓→) gives the correct answer -6 and -42. So, either the directions of currents can't be chosen freely, or I'm somehow fumbling what should be simple maths. In the first case, what are the basis of choosing a direction that I'm missing? In the second case, what am I doing wrong?

    Thank you for reading!
     
    Last edited by a moderator: May 6, 2017
  2. jcsd
  3. Aug 12, 2014 #2

    berkeman

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    Staff: Mentor

    I don't like having to think that much, so I just use "the sum of all currents leaving a node = 0" form of the KCL rules. Can you try that method, and post your work?
     
    Last edited by a moderator: May 6, 2017
  4. Aug 12, 2014 #3

    gneill

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    Staff: Mentor

    Be careful with your signs. If you make assumptions about current directions then you are also making assumptions about the relative potentials of the nodes. When you assume that the current at node 1 is flowing in via the 6Ω resistor you are also assuming that V2 > V1. So that current would be given by (V2 - V1)/6. You have written (V2 + V1)/6 instead.

    A simple way to avoid sign issue errors like this is to make the assumption, for each node, that all currents except explicit ones from sources (they are absolutely constrained by the source), are flowing either into or out of the node, and to write all the terms on the same side of the equation so that they must sum to zero. So, for example, for node one if we say that all currents are flowing out of the node:

    $$-3 + \frac{V1 - V2}{6} + \frac{V1}{2} = 0$$
    Yeah, it's just sign errors in the writing of the terms in the equations when the implied assumptions about relative potentials get missed.
     
    Last edited by a moderator: May 6, 2017
  5. Aug 13, 2014 #4
    Sign errors, bane of my existence, we meet again...!

    Hm, I'm still getting the wrong answer. (Goodness, how can someone be this consistently wrong!) I'm trying with assumptions of →↓← (node 1) and ←↑→ (node 2), which means that node 2 is of higher potential than node 1.

    Node 1:
    [itex]3+(\frac{1}{6})(v_{2}-v_{1})-(\frac{1}{2})v_{1}=0[/itex]
    [itex]-(\frac{1}{6})(v_{2}-v_{1})+(\frac{1}{2})v_{1}=3[/itex]
    [itex]-(\frac{1}{6})v_{2}+(\frac{1}{6})v_{1}+(\frac{1}{2})v_{1}=3[/itex]
    [itex](\frac{1}{6}+\frac{1}{2})v_{1}+(\frac{-1}{6})v_{2}=3[/itex]

    Node 2:
    [itex](\frac{1}{7})v_{2}-(\frac{1}{6})(v_{2}-v_{1})-12=0[/itex]
    [itex](\frac{1}{7})v_{2}-(\frac{1}{6})v_{2}+(\frac{1}{6})v_{1}=12[/itex]
    [itex](\frac{1}{6})v_{1}+(\frac{1}{7}-\frac{1}{6})v_{2}=12[/itex]

    But this still gives [itex]v_{1}=162[/itex] and [itex]v_{1}=630[/itex]...

    So I got to thinking. Current goes from higher potential to lower potential, so writing for example [itex]\frac{v_{2}}{7}[/itex] in actuality means [itex]\frac{v_{2}-0}{7}[/itex], so I'm not just explicitly assuming that [itex]v_{2}>v_{1}[/itex], but also that [itex]v_{2}>0[/itex]. But, can that be the case? If the larger current source has the ground on its positive side and node 2 on its negative side, does that actually mean that node 2 must be of lower potential than the ground? In that case, I'm missing some constraints, right?

    Let's try guessing directions again...

    1) Node 1: (→??) Node 2: (??→) The current sources.
    2) Node 1: (→??) Node 2: (?↑→) If node 2 is lower than ground, current must flow in from the 7 Ω resistor.
    3) Node 1: (→?←) Node 2: (←↑→) If I guess that node 1 is even lower...
    4) Node 1: (→↓←) Node 2: (←↑→) ...then current must flow from the node, over the 2 Ω resistor. To the ground. But the ground is higher. So that's inconsistent!

    Undoing two steps, and...

    3) Node 1: (→?→) Node 2: (→↑→) I must assume that node 1 is higher.
    4) Node 1: (→↓→) Node 2: (→↑→) Let's just assume that [itex]v_{1}>0>v_{2}0[/itex].

    Node 1:
    [itex]3-(\frac{1}{6})(v_{1}-v_{2})-(\frac{1}{2})(v_{1}-0)=0[/itex]
    [itex](\frac{1}{6})(v_{1}-v_{2})+(\frac{1}{2})v_{1}=3[/itex]
    [itex](\frac{1}{6}+\frac{1}{2})v_{1}+(\frac{-1}{6})v_{2}=3[/itex]

    Node 2:
    [itex](\frac{1}{6})(v_{1}-v_{2})+(\frac{1}{7})(0-v_{2})-12=0[/itex]
    [itex](\frac{1}{6})v_{1}+(\frac{-1}{7}-\frac{1}{6})v_{2}=12[/itex]

    And this gives... [itex]v_{1}=-6[/itex] and [itex]v_{1}=-42[/itex]! Holy moly!

    Was that it? Was my most fundamental error the implicit assumption that node 2 could be higher than ground? Then again, in that same circuit, the smaller current source has its negative side on 0 and its positive side at -6 V, so that can't be a general principle... So, was it just sign errors after all? Am I allowed to assume that [itex]v_{2}>0[/itex]? If so, I still can't identify the errors in my calculations.
     
  6. Aug 13, 2014 #5

    gneill

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    Staff: Mentor

    Looks good for Node 1.

    Okay, when you made the first term (for the current through the 7 Ω resistor) positive, that fixed the implicit assumption that you are summing currents LEAVING the node. But then second term, which is indeed a current leaving the node (direction v2 to v1) is made negative! This reverses the direction and breaks the implied assumption. The same is true for the current source term, 12. It's already leaving the node so it should have a positive sign to be consistent with your sign choice of the first term.

    It's a matter of definition of the current! The current from v1 to v2 though some resistance R is defined to be (v1 - v2)/R, regardless of what the actual potentials of v1 and v2 are. The assumed direction is set by the choice of which potential is subtracted from the other.

    Yeah, just don't worry at all about "actual" potentials or guessing current directions. Implied current directions are strictly defined by the "definition" of positive current flow. So a term like (Va - Vb)/R defines the assumed positive direction for I to be from a to b. Just choose one or the other of "all flowing in" or "all flowing out" and write the terms accordingly. Deal with source current signs according to your choice of "all in" or "all out".
     
  7. Aug 13, 2014 #6
    Hm, are we on the same page here? The assumptions I wanted to work from was that
    • node 1 was →↓← (3 A enters, [itex]i_{2Ω}[/itex] leaves, [itex]i_{6Ω}[/itex] enters) and
    • node 2 was ←↑→ ([itex]i_{6Ω}[/itex] leaves, [itex]i_{7Ω}[/itex] enters, 12 A leaves).
    If I'm to sum (for example) leaving currents, should it not be [itex]-3+i_{2Ω}-i_{6Ω}=0[/itex] and [itex]i_{6Ω}-i_{7Ω}+12=0[/itex]?

    But that's just the same as what I got from using "positive currents going in = positive currents going out":
    [itex]3+i_{6Ω}=i_{2Ω}[/itex] and [itex]i_{7Ω}=12+i_{6Ω}[/itex] or
    [itex]i_{2Ω}-i_{6Ω}=3[/itex] and [itex]i_{7Ω}-i_{6Ω}=12[/itex]. And now, if I use both [itex]i_{6Ω}=\frac{v_{2}-v_{1}}{6}[/itex] and [itex]i_{7Ω}=\frac{0-v_{2}}{7}[/itex] I get the correct results.

    That was it, right? I assumed that [itex]i_{7Ω}[/itex] entered node 2, but then I wrongly used [itex]i_{7Ω}=\frac{v_{2}-0}{7}[/itex] which implied that the current exited node 2. Which didn't work, not because of situational inconsistencies or whatever I was rambling about earlier, but just because those conflicting assumptions demanded different signs – therefore, I got sign errors.

    (Oh, I get what you were saying about using the =0 form of KCL, assuming all unknown currents' directions for a node are the same, and summing terms as either leaving or arriving, to safeguard a bit against sign errors, and I'll definitely start doing it like that, but when I hit snags like these I feel like I just have to pinpoint my exact errors in thinking before I can change my ways.

    Thank dispensed!)
     
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