# Homework Help: Circuit Analysis of a Positive Offset Clamping Diode Circuit

1. Oct 21, 2012

### stn0091

1. The problem statement, all variables and given/known data

Plot the waveforms for capacitor voltage VC, output voltage Vo, and diode voltage Vd given that Vs is a 20 Vpp triangle wave with period T. Use CVD model with diode VON = 0.7 V.

2. Relevant equations

KVLs?

3. The attempt at a solution
From my basic understanding of a clamper, I can see that the output is offset by +2 V. Thus Vo begins at +2v, Vc begins at -2V, and the diode voltage begins at 0V and heads towards -10V (off, reverse bias).

However, I can't manage to show this analytically.

KVL around the left side gives:
Vs - Vc + Vd - 2V = 0

At the same time, I know that Vo + Vd - 2 = 0.

I can't really solve anything with just these two equations though.

I can say that Vs - Vc = Vo, but these equations just take me in circles.

Again, I understand that Vo starts at 2V and rises in step with Vs. With that said, Vo = 12 V at when Vs reaches its first 10V peak. At T/2 when the input becomes negative, the diode turns on and the capacitor can start charging. With the diode on, output Vo is clamped to 2V - 0.7V = 1.3V. The 0.7V is the diode drop from the CVD model.

It stays on until 3T/4. By that point, the capacitor has charged to -11.3V. From 3T/4 onwards, diode remains off. Capacitor has no discharge path and remains at -11.3V. At the second 10V peak, Vo is 21.3V.

I just don't know how to show ANY of that with work, which doesn't earn me any points when I have to analyze this on a test.

#### Attached Files:

File size:
7 KB
Views:
556
• ###### clamp2voff.png
File size:
1.2 KB
Views:
689
Last edited: Oct 21, 2012
2. Oct 21, 2012

### Staff: Mentor

Hi stn0091. http://img96.imageshack.us/img96/5725/red5e5etimes5e5e45e5e25.gif [Broken]

Do you have simulation software that you can construct this and see precisely what it does? It helps a lot when you know what you are aiming to explain. There can be a big difference between how a circuit behaves for the first so many cycles, and how it operates well down the track once it has settled down to a steady state.

Last edited by a moderator: May 6, 2017
3. Oct 21, 2012

### stn0091

Yes, I simulated the circuit using PSPICE. Just from observation of the circuit, I can tell how it behaves for the first few cycles, even without the simulation. I just can't manage to write it down with some work.

At 0 seconds, is the circuit assumed to be in DC steady state? Is it valid if I say the entire circuit is assumed to have been off for a long period of time such that the capacitor is discharged and open and there is no current anywhere in the circuit?

If that's the case, that might help a bit.

Under DCSS at 0-:

Vs = 0V

Vc = Vs - Vo

Vo = -Vd + 2

There is no current, so there's no drop across the diode so Vd = 0V.

Working back up that list up equations,

Vo = 2V
Vc = -2V

Those numbers agree with my intuitive understanding of the circuit and what PSPICE says.

Question: I said that the capacitor was fully discharged at DCSS for t = 0-. How can Vc = -2V in that case? Shouldn't it be zero? Or does "discharged" just mean any value < 0? This stuff from basic circuits is really throwing me off.

That was all at DCSS at 0- seconds. Now turn Vs on.

Diode will be in reverse bias so the circuit is still "off."

With KVL, I again have:

Vs - Vc - Vo = 0

Capacitor has no path so Vc remains constant at -2V. Let's say I'm at the first 10V peak at T/4 seconds.

10 - (-2) - Vo = 0
Vo = 12V

Is that all logically sound so far? Are my assumptions valid?

Last edited: Oct 21, 2012
4. Oct 21, 2012

### Staff: Mentor

Umm, I was hinting that you should post a graph of vā(t) over multiple cycles. http://imageshack.us/a/img854/9793/tazm.gif [Broken] This might allow us to cut to the chase with the explanation.
For this circuit, the only current path includes the capacitor, and since we can't have a steady current into a capacitor without its voltage soaring towards infinity, then, yes, the current must have zeroed.
The 2V source is not part of the input and is not switched in at t=0; that 2V is always present so it takes part in determining the equilibrium conditions before t=0.
It's right so far.

We need your graph of vā(t).

Last edited by a moderator: May 6, 2017
5. Oct 22, 2012

### stn0091

Not exactly a triangle wave, but it still follows the same general shape. Top/pink is Vo, middle/purple is Vs, bottom/red is Vc.

#### Attached Files:

• ###### Untitled.jpg
File size:
114.3 KB
Views:
497
6. Oct 22, 2012

### Staff: Mentor

Are those waveforms close to what you expected to find? Can you explain what they show, and some of their features?

7. Apr 24, 2013