Dismiss Notice
Join Physics Forums Today!
The friendliest, high quality science and math community on the planet! Everyone who loves science is here!

Delay through CMOS Inverter.

  1. Jul 30, 2013 #1
    When calculating delay, like the fall time delay of the output, through an inverter with rc model of the transistors (assuming Cmos inverter) why do we neglect the short circuit current through the device and what are the assumptions.

    Can anyone explain this?
  2. jcsd
  3. Aug 1, 2013 #2


    User Avatar
    Science Advisor

    By short circuit current I assume you are referring to the short period while both the upper and lower output drivers may be conducting at the same time. If it occurs, that short duration current is limited by the inductance and resistance of the path.

    Any short circuit current is flowing through a potential divider comprising one complementary transistor pair. The signal is propagating perpendicular to the short circuit current and so is not effected. Any minor influence on the simple model will be taken into account by adjustment of the RC parameters.
Know someone interested in this topic? Share this thread via Reddit, Google+, Twitter, or Facebook

Have something to add?
Draft saved Draft deleted

Similar Discussions: Delay through CMOS Inverter.
  1. 240 volt INVERTER (Replies: 1)

  2. Inverter Frequencys (Replies: 4)

  3. Flow through a tube (Replies: 1)