Designing a CPU Using Multimedia Logic - Need Advice

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The discussion revolves around the challenges of designing a simple single-cycle CPU using multimedia logic software, which is perceived as limited in flexibility and poorly documented. The original poster seeks guidance on using this software effectively for implementing a sorting algorithm. Participants express confusion over the choice of multimedia logic over more established tools like Xilinx's ISE, which offer greater design freedom and resources. There are concerns about the software's usability, particularly regarding the lack of components like multiplexers, which complicates the design process. Overall, the need for better documentation and support for multimedia logic software is emphasized.
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I have recently been commanded with the task of designing a simple single cycle CPU to implement a sorting algorithm. We must design the project using multimedia logic. I have an idea how to design the processor, but I have no idea how to use this software. From my basic understanding of it, it doesn't allow me much flexibility. I've tried googling how to go about designing CPU's with this software, however it's grossly underdocumented(to my knowledge). Is there anyone with knowledge of this software??
 
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Basher1 said:
I have recently been commanded with the task of designing a simple single cycle CPU to implement a sorting algorithm. We must design the project using multimedia logic. I have an idea how to design the processor, but I have no idea how to use this software. From my basic understanding of it, it doesn't allow me much flexibility. I've tried googling how to go about designing CPU's with this software, however it's grossly underdocumented(to my knowledge). Is there anyone with knowledge of this software??

Can you please say a bit more about what "multimedia logic" is? I'm not familiar with the term yet. :smile:
 
apologies, Multimedia logic is software that is used to design and simulate logic circuits. I am interested in using it to design a processor but I can't find any documentation on how to use this software correctly
 
Basher1 said:
apologies, Multimedia logic is software that is used to design and simulate logic circuits. I am interested in using it to design a processor but I can't find any documentation on how to use this software correctly

Do you mean like Xilinx's ISE design tools? Their WebPack version is free:

http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.htm

You use this to design the FPGA/CPLD parts that make up your system. There are lots of FPGA/CPLD design tutorials on the web based on RTL or Verilog or VHDL hardware design languages. There are probably courses also offered at your local community college on this type of design tools, if that helps.
 
Basher1 said:
No, i know how to use project navigator but we can't use it in this project. here is the link for the software homepage. http://www.softronix.com/logic.html

Looks spammy to me. Why in the world would you be required to use those tools instead of being able to use professional-grade free design software from an industry leader like Xilinx?

And how is this spammy looking design software different from Xilinx's ISE? If you can use the Xilinx software, you should be able to use simpler tools like this, IMO.
 
@ berkeman: I'm curious why you think this is spammy software? Looked ok to me, but I didn't install it.

Designing logic with schematics is so old-school. Is it an old school? An old teacher?

Aside from that, would you know how to design a cpu from scratch using Xilinx ISE? The process isn't much different.
 
Because not everyone else who is doing this unit has got expierience with Xilinx ISE. The reason I find it difficult is there is too many restrictions on what you can do with the components. For example, I created a 16-bit Instruction memory by placing two generic 8-bit memory components side by side, I connected their data inputs and write enable lines to ground(since you don't write to IM unless its being programmed), then I connected a counter to the address inputs of the IM and loaded it with a sample program. This gave me a nice sequential program flow. But what if I want to change program flow(like with a branch)?. In Xilinx ISE I would probably add an 8-bit 2:1 Mux. In this there is no 8-bit 2:1 Mux, I would need another way. ISE gives virtually no limitations except what is physically achievable whereas in the logic simulator you are limited by restrictions of the software. This would be fine if I could find some documentation on the software but I can't. Yeah I guess the Teacher is old school, but my university has really good facilities.
 
There are MUX's but they are all bit lines, you cannot switch buses, there is a bus tool, again they are all bit lines. I can't for the life of me figure out how that is useful, and I'm guessing there is some approach to designing processors in this software but if there is I haven't found it.
 
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Sounds like you know what you are doing. I can be of no help with the tool. Sorry.
 
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