Field Effect Transistor - High Input Impedance

AnonymousPT
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I know FET offers a very high input impedance..but what's the reason behind it? Is it due to the reverse voltage applied at gate with respect to the source which makes the P-N junction reversed biased? If that the case, what happens when there is no voltage applied at gate?
 
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The very high impedance is caused by the isolation layer between gate and channel. For the case of a MOSFET it is made of SiO2 (resistance 1016 Ω m). So, because of this, applying a voltage to the gate gives a small current - leakage current. If you compare to a normal bipolar transistor, this needs considerably more current to its collector - depending on the application, in order to operate and this implies some bigger current on its base too.
 
What about JFET? There is no such insulating layer between the gate and the channel.. Then?
 
JFETs have a narrow piece of high resistivity semiconductor material. Thus, a channel is formed ( N-type or P-type Si), through which there is flow of majority carriers. The channel is doped with donor impurities for N-Channel JFETs (negative current flow) or acceptor impurities for P-Channel (positive current flow).
 
AnonymousPT said:
What about JFET? There is no such insulating layer between the gate and the channel.. Then?

There is a reverse-biased diode between the gate and the channel in a JFET. So the only current that flows into the gate is the diode reverse leakage current, which is very small. The gate current is not as low as a MOSFET, but it is much lower than the base current in a BJT.
 

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