Grounding Op-Amp circuit exercise

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Discussion Overview

The discussion revolves around a homework exercise related to grounding in op-amp circuits, specifically addressing questions about voltage drops, MOSFETs, and decoupling capacitors. Participants seek clarification on various parts of the assignment and share insights on methods and calculations involved.

Discussion Character

  • Homework-related
  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant expresses confusion about the nature of a capacitor between Q1 and X1, questioning if it relates to voltage reduction from a previous part of the exercise.
  • Another participant notes the poor quality of images shared for the attempted solutions, suggesting that clearer images are necessary for effective assistance.
  • Concerns are raised about the lack of coverage of MOSFETs in lectures, leading to uncertainty about how to approach related questions.
  • Some participants discuss the need for a decoupling capacitor on the 24V rail, indicating its relevance to the circuit design.
  • Clarifications are provided regarding the calculation of voltage drop due to the FET gate current and the use of frequency from a previous question.
  • Participants debate the meaning of "average AC" in the context of the assignment, with one suggesting it may refer to RMS values.
  • There is discussion about the op-amp ground current, with questions about whether it should be found in a datasheet or calculated, and how it relates to supply current.
  • One participant suggests modeling the output as a constant current feeding the gate capacitance of the FET, leading to further exploration of waveform characteristics.
  • Another participant clarifies that the gate voltage will be a triangle wave while the ripple on the supply voltage will be a square wave due to the PCB trace impedance.

Areas of Agreement / Disagreement

Participants express varying degrees of understanding and uncertainty regarding the questions posed in the homework. There is no consensus on specific answers, and multiple interpretations of the questions and calculations remain evident throughout the discussion.

Contextual Notes

Participants note limitations in their understanding due to incomplete coverage of topics in lectures and the quality of shared materials. There are also unresolved assumptions regarding the calculations and the nature of the waveforms involved.

Who May Find This Useful

This discussion may be useful for students working on similar homework problems related to op-amp circuits, grounding techniques, and the behavior of MOSFETs in electronic designs.

Weaver
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Homework Statement


IMG_20181108_133527.jpg


IMG_20181108_133539.jpg


IMG_20181108_133545.jpg


IMG_20181108_133558.jpg



2. Homework Equations
3. The Attempt at a Solution

For the first set of questions:
part1.jpg

part2.jpg

part3.jpg


part4.jpg


I've worked through to part 6), at which is I encountered my first problem. I'm not entirely sure what the question is asking. Is it as if there would be a capacitor between Q1 and X1? Is the voltage to be reduced the one calculated in part 5)?

Moving on from that

part5.jpg


I am also unsure about part 9) and 10). We haven't really covered MOSFETs in lectures so these two questions are a bit lost on me. Do I use the frequency, current and resistance to get the average value?

AnswerSheet2.jpg

For the second answer sheet for I haven't worked out 5), 7), 9), 12) However I am working on this right now. I will probably have questions later on this

I don't want the answers, but rather help on what methods I should be doing or perhaps pointers to resources that would help

Also, I'm not even certain what I have done is correct

I appreciate any help

Thanks in advance,
 

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Those images under attempt at a solution are too poor quality to read. You probably won't get any answers until you post something more legible.
 
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anorlunda said:
Those images under attempt at a solution are too poor quality to read. You probably won't get any answers until you post something more legible.
Thanks for that. I'm at uni, so I don't have access to a scanner. I will update them later tonight

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Conor_B said:
Thanks for that. I'm at uni, so I don't have access to a scanner. I will update them later tonight
]
I've decided to make smaller threads asking about the problems i have been having more specifically with typed solutions (my scanner broke) so that it is easier to follow. I would delete this thread, but I don't know how

https://www.physicsforums.com/threads/calculate-current-following-in-op-amp-to-ground.959831/

https://www.physicsforums.com/threads/decoupling-capacitor-for-pcb-track.959829/

https://www.physicsforums.com/threads/ground-current-for-voltage-regulator.959832/
 
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It was a mistake to have several threads running on the same problem.

Regarding the capacitor on X1 Q1... they are talking about a decoupling capacitor you need to add. It would be on the 24V rail. See my reply in your other thread where I mention ripple currents.
 
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CWatters said:
It was a mistake to have several threads running on the same problem.

Regarding the capacitor on X1 Q1... they are talking about a decoupling capacitor you need to add. It would be on the 24V rail. See my reply in your other thread where I mention ripple currents.
Apologies for that. I thought it might help break up the question. I won't do it again. Thanks for replying in the other forum
 
I haven't looked at your working for 1-6 properly but..

For 9. It asks you to calculate the voltage drop down a typical PCB trace due to the 10mA FET gate current. Use the frequency you calculated in 8.

EDIT: In case it's not obvious this current flows in and out of the MBED power/ground pins on it's way to/from the FET gate.

For 10: Similar to Q6
 
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CWatters said:
I haven't looked at your working for 1-6 properly but..

For 9. It asks you to calculate the voltage drop down a typical PCB trace due to the 10mA FET gate current. Use the frequency you calculated in 8.

EDIT: In case it's not obvious this current flows in and out of the MBED power/ground pins on it's way to/from the FET gate.

For 10: Similar to Q6

Thank you very much! I get and I think I have those out figured. When it asks average AC, does that mean RMS?
I’ve followed through with the rest of the questions. The last one I have a problem with the op amp ground current

Should there be a value in a data sheet for this? Or is it calculated?

If it’s calculated, at worse case, the op amp will have 0V at it’s In(+) so no voltage appears at the output. So at this point it is just the supply current into the op amp?
 
Conor_B said:
Thank you very much! I get and I think I have those out figured. When it asks average AC, does that mean RMS?

That's what I would answer. Not sure why they ask for that as it's the peak to peak that more important.

Edit: Earlier they suggest you model the output as a 10mA current source feeding the gate capacitance of the FET. So perhaps think carefully about the waveform and how you do the rms calculation.
 
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  • #10
Conor_B said:
The last one I have a problem with the op amp ground current

Should there be a value in a data sheet for this? Or is it calculated?

If it’s calculated, at worse case, the op amp will have 0V at it’s In(+) so no voltage appears at the output. So at this point it is just the supply current into the op amp?

I agree.
 
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  • #11
CWatters said:
That's what I would answer. Not sure why they ask for that as it's the peak to peak that more important.

Edit: Earlier they suggest you model the output as a 10mA current source feeding the gate capacitance of the FET. So perhaps think carefully about the waveform and how you do the rms calculation.

Right, so the waveform is generated from the resistance and inductance of the the PCB with the ripple current produced from the MOSEFT. In this case is the Vripple close to a square
waveform as it is the MOSFET switching?

(By the way, I really appreciate all the help you've given)
 
  • #12
No isn't this Q9 where they ask about the MPEG average AC current? Eg due to the FET gate current not the source/drain current.

What I was hinting at is that a constant current (10mA) driving a capacitor (FET gate) produces a triangle wave
 
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  • #13
Actually forget that. The gate voltage will be a triangle wave but the ripple on the supply voltage will be a square wave as it's the constant 10mA * PCB trace impedance.
 
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  • #14
CWatters said:
Actually forget that. The gate voltage will be a triangle wave but the ripple on the supply voltage will be a square wave as it's the constant 10mA * PCB trace impedance.

Okay, so as it's a square wave, the Vrms is just the peak voltage in this case?
 
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  • #15
Yes that would be my answer for that question.
 
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  • #16
CWatters said:
Yes that would be my answer for that question.
Great! Thank you for all the help you've given. Definitely helped improve my understanding! Really appreciate it
 

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