Holiday project goals for undergrads with an FPGA?

[kostoglotov]

It's a student project for vacation research, under-grad, not sure how many of us, there'll probably be 4-6, we're motivated.

My original proposal was to get an FPGA (on an Artix-7 or Z-board) to run a CID camera sensor as a dumb peripheral, do some basic image processing stuff on it (perhaps edge detection and dynamic windowing), and output a bitmap to a PC.

One of the faculty who has about 16 years experience with FPGAs has suggested that for my (and my colleagues) level, this might not be achieveable in a 6-10 week time-frame (we're all pretty much beginners).

We wish to keep the original goal on a more long term basis, but want now to have some other project goals, that would move us towards having the skills and experience (and perhaps some of the IP) for this ultimate goal.

What would some good intermediate project goals be for a group of undergrad beginners with a summer holiday to spend if we ultimately would like to get an FPGA doing cool stuff with a CID camera sensor?

 

[Nidum]

http://www.pyimagesearch.com/2015/09/14/ball-tracking-with-opencv/

http://www.pyimagesearch.com/start-here-learn-computer-vision-opencv/

 

[Nidum]

Perhaps forget the FPGA and just use a laptop or RaspberryPi . Concentrate on the image recognition part of your project .

 

[kostoglotov]

Perhaps forget the FPGA and just use a laptop or RaspberryPi . Concentrate on the image recognition part of your project .

No.

The entire point of the project is to get experience with FPGAs and VHDL and Vivado.

 

[berkeman]

How about a software defined radio? You could use a simple RF front end to get you some baseband audio to process.

Or implement a uP architecture with the FPGA, including the ALU, registers, a simple command set, etc. You can size the uP based on the size of the FPGA -- how many bits and how fast can you make the uP?

What memory resources are on those FPGA evaluation boards?

EDIT/ADD -- Or you could implement a real-time encryption/decryption engine for a secure data network. Again, you need to size how many bit encryption you can implement in the FPGA based on how fast you want the data network to be running. Implement 2 nodes, and demonstrate bi-directional communication...