How Can I Create a Testbench for a 1-Bit Adder Circuit?

[EvLer]

So, I am trying to design a testbench for 1-bit adder first, I have 3 inputs A, B and Cin with 2 outputs Sum and count;
would I just have 3 loops, one for each input?
thanks.

 

[berkeman]

What tool are you using for running your testbench? Does the documentation give some examples of testbenches? Usually a testbench will consist of a number of rows, corresponding to clock cycles. The columns in each row correspond to the input values and previous output values. The rows are like "states", and the clocking that transitions you from row to row sequences the states. The syntax can vary some, depending on the tool that you use to run the testbench.