How Can You Build a Majority Vote Counting Machine Using Only NAND Gates?

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The discussion revolves around designing a majority vote counting machine using only NAND gates, specifically for four input votes. The solution involves understanding the Boolean expression for majority voting, which is ABC + ABD + ACD + BCD. Participants emphasize the need to simplify the design using NAND gates and inquire about constructing OR gates from NANDs. There is a focus on creating a clear initial truth table and logic implementation to guide the design process. The conversation highlights the challenge of optimizing the circuit while adhering to the constraints of using only NAND gates.
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Homework Statement



Using NAND, AND OR, &/or NOR gates build a vote counting machine. It should light an LED when majority votes are true (or answer "yes"). Assume 4 input votes only.


Homework Equations



Boolean Logic

The Attempt at a Solution



So I know the solution in terms of algebra, which is ABC + ABD + ACD + BCD (where ABCD are the 4 input votes) and I know at the end I need two OR gates summing up to one single OR gate. Not sure how to design the beginning though.

I am also looking for a way to simplify it since I have to build the whole thing out of NAND gates only.
 
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daskywalker said:

Homework Statement



Using NAND, AND OR, &/or NOR gates build a vote counting machine. It should light an LED when majority votes are true (or answer "yes"). Assume 4 input votes only.


Homework Equations



Boolean Logic

The Attempt at a Solution



So I know the solution in terms of algebra, which is ABC + ABD + ACD + BCD (where ABCD are the 4 input votes) and I know at the end I need two OR gates summing up to one single OR gate. Not sure how to design the beginning though.

I am also looking for a way to simplify it since I have to build the whole thing out of NAND gates only.

Your problem statement doesn't confine you to 2-input gates. It only takes two levels of logic to do it with AND-OR logic, right?

Are you constrained to only using 2-input NANDs for the final circuit? How do you make an OR out of a NAND? Have you looked at the inverted function in case it offers some optimization? Please show us more work...
 
Yeah we can have 4 inputs, but I am still not sure about you saying using the two level AND-OR logic.
I know how to construct the different kind of gates from NAND gates now, just need a clear concept how to solve this problem.
 
daskywalker said:
Yeah we can have 4 inputs, but I am still not sure about you saying using the two level AND-OR logic.
I know how to construct the different kind of gates from NAND gates now, just need a clear concept how to solve this problem.

Show us your initial truth table and initial logic implementation.
 

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