# Impedance matching in a circuit

When you design an impedance match, that match is optimum at only one frequency. With frequencies above or below that frequency the match won't be optimum and there will be some loss. The difference between where the upper frequency power loss is equal 3 dB and the lower frequency where the power loss is equal to 3 dB, is the bandwidth of the matching network. As I said above, normally you want that bandwidth to be as large as possible and therefor the Q to be as low as possible.

This has little or nothing to do with your signal's bandwidth except that the matching network needs enough bandwidth to pass your signal.

the main reason, i cant jump with yungmans result is because, i have designed a PCB with true hole components and hence the value of inductor is too low. i can get only SMD inductors, which cant be fixed over it. so is the any other way to design the high value of inductor or neglect it and get some other way for solving this problem.

I don't think you can use through hole components for 2.6GHz!!! Too many parasitic with these big components. It's already at the edge of surface mount components at this frequency!!! That is the reason I kept offering you alternative transmission line solution for your problem. I can either realize the match with a single section of transmission line or use transmission line of high and low impedance that is shorter than $\frac {\lambda}{8}\;$ to substitude for the discrete components. But you said you don't want it.

If you are still interested, give me your stack-up. Stack up means the layer setup of the pcb. For example if you have a 4 layer pcb with top and bottom layer, two internal plane layer. If you pcb is 0.063" or 63 mil thich using 0.5oz copper. The 0.5 oz copper cladding is 0.7mil so the total contribution of 4 layers of copper is 2.8mil. So the dielectric is close to 60 mils. With that you divide the 60 mils into 3 different layers of dielectrics. Eg. one between the top and the first internal layer, second dielectric between first internal layer and the second internal layer. Third dielectric layer between second internal layer and the bottom layer.

So if you give me the thickness of those dielectric layers, the weight of the copper layer used and the material of the dielectric and the $\epsilon_r\;$, then I can design the transmission line or distribute elements for you. I am quite busy, but I should be able to get back to you in a day or two after you give me the info.

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the calculation yungman gave is perfectly fine, but i have a capacitor also in the line in excess, i need to include it, which is 0.01μf which helps to block the dc supply from other side. and also is it possible to increase the value of inductor because the 1.5nH will be available only as SMD component.

the circuit is working fine in 2.6GHz with through hole but the output has high losses, that is the main reason i am taking the impedance matching now.

the capacitor is fixed as per the figure attached to the before post, (please refer to it).

the calculation yungman gave is perfectly fine, but i have a capacitor also in the line in excess, i need to include it, which is 0.01μf which helps to block the dc supply from other side. and also is it possible to increase the value of inductor because the 1.5nH will be available only as SMD component.

the circuit is working fine in 2.6GHz with through hole but the output has high losses, that is the main reason i am taking the impedance matching now.

the capacitor is fixed as per the figure attached to the before post, (please refer to it).
The circuit usually do not "not work", it just has more and more loss as the parasitic components start adding up. Don't think I can convince you that's it's a bad idea to use through hole in 2.6GHz.

The 0.01 cap it ok, don't worry about it. It is going to behave like a short circuit in this case if you don't look at the parasitic. Thing you have to watch out is the lead of the cap which is inductance add to the circuit. One way to use this inductance is to put the 1.2pF before the 0.01uF cap and use the lead inductance of the 0.01uF cap as the inductor. You can try moving the through hole 0.01uF cap up and down to increase and decrease the lead length ( which is increase and decrease the series inductance ) to get the lowest loss. Then just specify the height of the cap on your design.

Hope you follow what I meant. It does not take much lead length to get the right inductance. Alternatively, you can use wire wrap wires, cut a 2" length and use it as an inductor, then trim until you get the least attenuation and call it as the inductor!!!!

It is a bad idea, but given your limitation, this is all I can think of at the moment. A better way is to put just those two as surface mount. But I have a suspicion that your loss is the sum of the through hole components that cause it, using your theoretical 25 to 50 matching likely will not help. RF design need to consider the source, matching network and the load with all the parasitic. That's the reason I like to use distribute elements to do matching so I don't have to deal with parasitic...........at least for the lower MW like 2.6GHz.

I know your feeling of not wanting to go surface mount, I was like that before. I got too comfortable with through hole components, easy to work and test. But the world change, frequency go higher and higher. Actually people already go into RFIC and hybrid where everything is micro size. I remember I can't even get a Mini Circuit amp working with through hole design no matter what, it keep bursting into oscillation!!! Then later I use the same amp in surface mount and it's calm like a baby..........well some baby!!!!

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Just to let you know, a 25 ohm load has a VSWR of 2.0 in a 50 ohm environment. Not good, but not horrible. What this means is your transmitted power is ~89% or so, or you have about a 0.5dB of transmission loss. Since it sounds like your loss is more substantial, you might be fighting something else besides the 50 ohm -> 25 ohm mismatch. What you are probably fighting (without knowing more of the layout) is the inductance of all of the through-hole leads, which is acting like an inductor (and hence low-pass filter). Moving forward you should probably measure the circuit with a network analyzer to see where you are at exactly, and then progress from there. If your school has an RF lab (assuming you're at a Uni), then it will have to have a network analyzer.