Dismiss Notice
Join Physics Forums Today!
The friendliest, high quality science and math community on the planet! Everyone who loves science is here!

LTSpice Clock signal distortion

  1. Dec 14, 2013 #1
    I made a counter using Dflop in Ltspice. But when I am using the count bits as signal to other circuits the clock signal is getting distorted. Why is this happening? How can I overcome this problem?
  2. jcsd
  3. Dec 14, 2013 #2


    User Avatar
    Science Advisor

    You might be loading the Dflops too much. Try putting buffers between the counter output bits and whatever circuit they are driving.
  4. Dec 16, 2013 #3
    can you post your LTSpice schematic and results showing the distorted clock?
Know someone interested in this topic? Share this thread via Reddit, Google+, Twitter, or Facebook

Have something to add?
Draft saved Draft deleted

Similar Discussions: LTSpice Clock signal distortion