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Measuring propagation delay of 4000 logic family chips

  1. Mar 22, 2013 #1
    Is there a simple way I can measure the propagation delay of my logic gates? For instance, is there a circuit I can build (using logic gates) to measure the propagation delay?

    What if I tried building a circuit whose output constantly oscillates? This would certainly prove that the propagation delay is very low, but is this a good idea? Will my chip/battery die? Any expert opinions?

    BiP
     
  2. jcsd
  3. Mar 22, 2013 #2

    berkeman

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    Staff: Mentor

    Normally you measure it using a signal generator and an oscilloscope. Are you looking for alternate ways to measure the prop delay?

    If so, google "ring oscillator"...
     
  4. Mar 22, 2013 #3
    Yes, I'm trying to measure it with logic gates alone. Well not a precise measurement (not looking for specific numbers). I am basically trying to create an experiment to show the circuit oscillating rapidly. I am just worried that the propagation delay is so low that it will damage my chip. Is it safe to create an oscillating circuit using chips manufactured in the 4000 family? Will my chip explode?

    For instance, suppose I created the circuit Y = Y'. Certainly the output would constantly oscillate. But enough to damage my circuit?

    BiP
     
  5. Mar 22, 2013 #4

    berkeman

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    Staff: Mentor

    Did you do the Google search that I suggested? That is the typical gate-based way to measure prop delay.

    If you try doing it with just one inverter, the input and output voltages will settle to about Vcc/2 and stay there static. No oscillation unless you stick a crystal between the input and output of the inverter.

    And no, forming a ring oscillator does not damage the gates. That is a standard part of an EE's "toolbox" of useful circuits.
     
    Last edited: Mar 22, 2013
  6. Mar 22, 2013 #5
    Thanks!!!

    BiP
     
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