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How to toggle and latch using logic gates?

  1. Dec 10, 2016 #1
    We're implementing Dots and Boxes to logic circuits and the we would like to automate the process of changing turns. If you know the game, the game changes turn when one move doesn't score a point or form two or more boxes. I was able to create overlapping XOR gates that alternates from high to low without considering the score. And also a set of latches which turns high when a box (score) or two is formed.

    My question is, how can I implement the alternating turn in this game? Note that my set of latches which saves the state isn't a pulse but a constant output from combinatoric circuit. So basically, I want my output to toggle when a turn is moved but a score is not formed, and to latch when a turn is moved and a score is formed.
     
  2. jcsd
  3. Dec 11, 2016 #2

    Svein

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    Here is the schematic for a JK flip-flop. If you keep J and K high, it will toggle.
    7473%20Page%206-51%20crop%20small.jpg
     
  4. Dec 11, 2016 #3
    Yes, I totally get how JK flip flop toggles when both J and K are high and latches when J and K are low. My problem is I have a continuous signal, not a pulsing one. As I said, I want my pulse to be coming from the overlapping XOR gates which alternates from high to low whenever it changes turn. However, I want both of its edges to be the trigger
     
  5. Dec 11, 2016 #4

    Svein

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    There are several ways to do that, it depends on what you have available. If you have a clock somewhere, you can run your signal through two D-flip-flops and use an XOR from D to Q on the last flip-flop. The output of that XOR will the be high for one clock cycle after the signal has changed state.

    In real life, you can do the same thing using an XOR on your signal, one part going directly to an input and the other delayed through an RC combination.
     
  6. Dec 11, 2016 #5
    I tried doing the RC circuit but it doesn't seem to work. The alternating input I stated earlier is connected to the XOR gate and two inverters which is also connected to the XOR gate. I added a resistor( 1K ohms ) and a capacitor between tose inverters but it seems that it also stays constant instead of pulsing. Am I doing the circuit right?
     
  7. Dec 11, 2016 #6

    Svein

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    The RC circuit has some restrictions, related to the logic family you are using. If it is a standard TTL, the R must be small, for CMOS it can be larger. the circuit I mentioned is a variation of this:
    upload_2016-12-11_11-12-3.png
     
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