Building a 3:8 decoder with tristate outputs

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Discussion Overview

The discussion revolves around the design of a 3:8 decoder with tristate outputs, focusing on how to modify existing decoders to achieve high impedance states for unused outputs. Participants explore the feasibility of this modification and the components involved.

Discussion Character

  • Technical explanation
  • Exploratory

Main Points Raised

  • One participant expresses the need for a tristate decoder that can have unused outputs as open circuits and questions the possibility of modifying a standard 3:8 decoder to achieve this.
  • Another participant suggests that using tri-state buffers on the outputs of the decoder might be a simpler solution, questioning whether the original poster's goal is to learn about the decoder circuit itself.
  • The original poster confirms they opted for tri-state buffers after learning about them and inquires about datasheets for these buffers.
  • A later reply identifies specific octal tri-state buffers, mentioning the '245 and '240 models, and distinguishes between slow and fast CMOS options.

Areas of Agreement / Disagreement

Participants appear to agree on the utility of tri-state buffers for achieving the desired functionality, but the discussion does not resolve whether modifying the decoder itself is feasible or necessary.

Contextual Notes

There is a lack of detailed specifications regarding the original decoder design and the specific requirements for the tristate outputs, which may affect the proposed solutions.

Bipolarity
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So all my 3:8 decoders have outputs only at 1 and 0. I need a tristate decoder that can be configured so that the unused outputs are open circuits (i.e. high impedance).

I know how to build a 3:8 decoder (using logic gates). How might I go about modifying it so that it has tristate outputs? Is this possible?

BiP
 
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Bipolarity said:
So all my 3:8 decoders have outputs only at 1 and 0. I need a tristate decoder that can be configured so that the unused outputs are open circuits (i.e. high impedance).

I know how to build a 3:8 decoder (using logic gates). How might I go about modifying it so that it has tristate outputs? Is this possible?

BiP

Would be easier to just put Tri-State buffers on the 8 outputs of the decoder, no? Or is your goal to build up the 3:8 decoder circuit to learn about it?
 
berkeman said:
Would be easier to just put Tri-State buffers on the 8 outputs of the decoder, no? Or is your goal to build up the 3:8 decoder circuit to learn about it?

Thanks! That's actually what I ended up doing once I learned about the tri-state buffer. Do you happen to know the datasheets for the tri-state buffer?

BiP
 
Bipolarity said:
Thanks! That's actually what I ended up doing once I learned about the tri-state buffer. Do you happen to know the datasheets for the tri-state buffer?

BiP

The '245 and '240 I think are octal Tri-State buffers. If you want slow CMOS, that would be the 74HC240 and 74HC245. If you want fast CMOS, that would be the AC or VHC families...
 

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