Single-phase full-bridge inverter with multiple pulse width modulation

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SUMMARY

The discussion focuses on the operation of a single-phase full-bridge inverter utilizing pulse width modulation (PWM) to control the current through its components, specifically four thyristors (Q1, Q2, Q3, Q4) and their antiparallel diodes. The participants analyze the waveform behavior during positive and negative cycles, noting that thyristors Q1 and Q3 are active during positive ON cycles, while Q2 and Q4 are active during negative OFF cycles. Concerns are raised about the behavior of the thyristors under reverse polarity conditions and the necessity of appropriate gate drive signals to manage these transitions effectively.

PREREQUISITES
  • Understanding of single-phase full-bridge inverter topology
  • Familiarity with pulse width modulation (PWM) techniques
  • Knowledge of thyristor operation and gate drive circuits
  • Basic concepts of inductive loads and their impact on waveforms
NEXT STEPS
  • Research simulation tools for single-phase full-bridge inverter analysis, such as LTspice or MATLAB Simulink
  • Learn about advanced gate drive techniques for thyristors in PWM applications
  • Investigate the effects of inductive loads on inverter performance and waveform shaping
  • Explore methods for safely turning off thyristors, including the use of flyback diodes
USEFUL FOR

Electrical engineers, power electronics specialists, and students studying inverter design and control techniques will benefit from this discussion.

sandy.bridge
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Hey guys. I have been theoretically playing around with a single phase full bridge inverter. What I wanted to do was determine the waveforms for the current going through each of the components (ie. the four diodes and the four thyristors). I assumed all of them were ideal. Since I have no idea how to simulate this, I was hoping someone here could verify if I have the correct logic in regards to my waveforms.

For the positive ON cycles, thyristors Q1 and Q3 are on. For the negative OFF cycles, thyristors Q2 and Q4 are on. The antiparallel diodes are there due to reactive load.

The reason I am unsure of my waveforms is I have only dealt with output cycles that go from positive to negative, then positive to negative, etc. This cycle goes positive positive positive negative negative negative, in regards to its polarity.

Obviously the minimum/maximum values will depend on the values of the circuitry.

Thanks in advance!
 

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That looks about what I'd expect, except ... :smile:

during the moment when the load has its current reversed.

At that moment things will be a bit more apoplectic than you show, though I'm not sure what to expect, exactly --- you are trying to turn the thyristors on while they have reverse polarity. Are you going to use unusual gate drive signals to handle this?

You are exemplifying a load with significant inductance, perhaps you could have a go at sketching the load voltage, too? :wink:

I'd expect a web search would be turn up a good discussion of this. http://imageshack.us/a/img811/5412/thgooglefriend1.gif

BTW, I notice you adroitly avoided showing how you intend turning off those thyristors at the end of each pulse.
 
Last edited by a moderator:
"flywheeling" diodes is an apt name
 

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