Transistor in saturation region

  • Thread starter erece
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  • #1
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Main Question or Discussion Point

when transistor is operated in SATURATED REGION , then for npn transistor BC junction becomes forward biased and holes will move from base to the collector, so more holes should be provided by the battery to the base terminal.
So if this is the case then base current should increase . But when we analyse the common emitter configuration then on applying KVL to input loop we get base current same in both active region and saturation region. How this is contradicting my previous conclusion of " increase in base current"
 

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  • #2
es1
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I have to admit I didn't really follow the logic but maybe this will help:

You have to also consider what lowered Vc to saturate the NPN. For the standard NPN common emitter what you should find is if the biasing network is holding Ib constant then Ic will have to drop, i.e. the collector resistor gets larger, to saturate the NPN. So for this particular application, although Ib stays constant, Ic/Ib drops.
 
  • #3
NascentOxygen
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when transistor is operated in SATURATED REGION , then for npn transistor BC junction becomes forward biased and holes will move from base to the collector, so more holes should be provided by the battery to the base terminal.
So if this is the case then base current should increase . But when we analyse the common emitter configuration then on applying KVL to input loop we get base current same in both active region and saturation region. How this is contradicting my previous conclusion of " increase in base current"
Does this thread help? https://www.physicsforums.com/showthread.php?t=636127
 
  • #4
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is it not necessary for a good designer to look inside working of devices ??
 

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