babygodzilla said:
do you mind explaining this BJT inverter (NOT Gate) to me?
http://www.ee.calpoly.edu/~dbraun/courses/ee307/F03/13/02_13_PhilippeGonzaga.html
When Vin = 5V, how is V3 (or V base) = 0.83V ? How do we know what the current and the voltage drop across that resistor is? and how does the output V4 become 0.019 Volts?
thanks!
edit: LINK ADDED! sorry my bad...
a) "When Vin = 5V, how is V3 (or V base) = 0.83V ? How do we know what the current and the voltage drop across that resistor is?"
Well there is a resistor in series with the base (RB=10K),
and the base to emitter voltage is given as 0.83V in
this case, and we know that the applied voltage to
the series circuit of base_resistor + base_emitter_diode
is 5V. So since VBE=0.83 then 5-0.83=4.17V must
appear across the 10K resistor in series with the base.
So 4.17V/10K = 417uA of current in both the base
and the base resistor with 4.17 across the resistor and
0.83 across VBE to make the total of 5V which is
supplied to be the base-resistor-emitter circuit.
The reason VBE=0.83V at IB=417uA is just because
"that's what it is" for that particular model of a transistor
device. Different transistor devices (or models of them)
could have somewhat different values of VBE vs IB vs
temperature. Generally they'll all be in the range of
0.4 to 0.9V for reasonable values of base current, though,
for single BJTs. Darlington pairs or unusual semiconductors
(i.e. not Silicon) will have different properties.
b) "how does the output V4 become 0.019 Volts?"
RC = 1000 ohms in series with the collector
because that's what the page says.
VCE_sat=0.019V when IB=417uA, and the page
says that the conduction of the transistor is in the
saturated region. In saturated conduction VCE is
always a 'small number' i.e. pretty much the smallest
possible number for that particular transistor with
that amount of IC flowing.
Since we know that V_supply=5V to the circuit
containing 1000 ohm resistors in series with VCE=0.019V
we realize that 5V (V_supply) = VCE (0.019) + V_resistor
so V_resistor = 5-0.019=4.981V across a 1000 ohm
resistor, so I_resistor = V_resistor/R = 4.981/1000=
4.981mA must be flowing in that collector circuit resistor,
and since it's in series with the collector, 4.981mA
is also IC.
So IE=IC+IB,
and IC=IB*Beta = 417uA * 11.9, so in this transistor
model under those conditions of modeled temperature
and base current, collector current, we see that the
beta is around 12 in saturation which is not unreasonable
since the very definition of saturation is that the collector
circuit is already passing essentially the maximum current
that it could and that no further increase in base current
is capable of producing any significant further increase
in collector current. VCE is already approximately
as small as it can get in saturation mode.
One could keep adding more IB and not get much any
more IC, so the apparent gain goes down during
saturated conduction since you're already applying
'more than enough' base current, and any additional
base current doesn't really increase collector current much.
Let's look at a case where the BJT is said to be
in forward active mode near the page bottom:
RC=1000
RB=10000
V_base_supply=0.7550,
VBE=0.7501
V_RB=V_base_supply-VBE=0.7550-0.7501=4.9mV
I_RB=V_RB/RB=4.9mV/10k=0.49uA
IB=I_RB since RB and IB are in series.
V_collector_supply=5
VCE=1.0660
V_RC=V_collector_supply-VCE=5-1.066=3.934
I_RC=V_RC/RC=3.934/1000=3.934mA
IC=I_RC=3.934mA since RC and IC are in series.
Beta=IC/IB=3.934mA/0.49uA=8028
This seems suspicious since Beta is about 100x higher
than it ought to be. Maybe there's a typographical error somewhere.
FYI in the listed PSPICE model for a BJT 'BF' is the forward
gain for the transistor model being defined, and in
the web page you linked, BF=80, so that should
approximately equal beta during the
forward region of relatively linear relationship between
IC and IB i.e. above cut-off and below saturation.
Apparent Beta=12 or really any value LESS than the
maximum forward region Beta is believable in saturation,
but having Beta *extremely* higher than the nominal
value in the forward region isn't usual unless you're
dealing with a transistor operated WAY outside of its
normally specified operating environment e.g. a
RF transistor designed to work at frequency 3GHz but
being used only at 1MHz, so of course the Beta might
be quite different over those extremely different frequencies.
Let's look at another listed case where the BJT is in forward active mode:
RC=1000
RB=10000
V_base_supply=0.6550
VBE=0.6549
V_RB=V_base_supply-VBE=0.0001
I_RB=V_RB/RB=0.0001/10k=10nA
IB=I_RB=10nA since RB and IB are in series.
V_collector_supply=5
VCE=4.901
V_RC=V_collector_supply-VCE=5-4.901=0.099
I_RC=V_RC/RC=0.099/1000=99uA
IC=I_RC=99uA since RC and IC are in series.
Beta=IC/IB=99uA/10nA=9900.
That doesn't make much sense either since the
expected forward linear region Beta=PSPICE BF=80,
and this is more than 100x too large and yet it's listed
as being an example of forward active mode conduction.
I can understand why you'd be confused by the way these
listed voltages and parameters relate. They're not
what I would expect from a BJT model that ostensibly
has a Beta of 80; I would think IB would be much higher
than it seems to be at the given VBE values
in the various modeled scenarios I've done the calculations for here,
and I'd think that the apparent BETA (obtained by IC/IB calculations)
would be much closer to the expected 80 in the forward region, and less
than that value in the saturation region.
Though the particular numbers of
VBE vs IB and apparent BETA aren't what I'd consider
very typical of many real transistors, the overall topology of the
circuit would indeed perform a logic inversion type of function for
reasons that are intuitively straightforward even if the
particular parametric examples are in part bogus (IMHO).
If you apply 0 voltage to the base, IB=0, and
the transistor doesn't conduct and pull the voltage output node
at the collector to ground.
With no conduction in the collector, or base the transistor
may as well not be in the circuit, and the output voltage will be
basically the same as the collector supply voltage since
there's no real pull-down load absent collector current.
If you apply a logic high voltage e.g. 5V to the base
circuit, you'll get several milliamps of base current
through the series base resistor, which could produce a
heavy collector current by multiplication by Beta,
and the transistor will be saturated in conduction with
a very small VCE_sat voltage well under 1V appearing at
the voltage output collector terminal.
Thus a 0V on the base supply -> 5V at the collector,
and 5V at the base supply -> nearly 0V (VCE_sat) at the collector,
and an inversion of logic levels from base to collector
has taken place.
If you look at the data sheet graphs for the real ZETEX
transistors I linked to, you can see that at very small
collector currents below 10mA, VCE_sat does indeed have
very small values, so the listed numbers in the examples
on your web page aren't horribly out of line with what
one might expect at small collector currents.
The model's VBE_on vs IB seems rather unusually large,
though, as does the apparent Beta. That's almost
the kind of BETA one might expect for a cascaded PAIR
of BJT's in a darlington configuration, and in that case,
the 'VBE' would be close to double what one would expect
for a single normal BJT too, but that doesn't explain
why BF=80 is listed in the PSPICE model on the page...
So who knows what the model really is for that transistor
and why the modeled parameters seem a bit unexpected in
some cases relative to the model parameters shown.
It's also strange that they didn't do a MUCH better job
indicating the CURRENTS in their graphed data points
since this is about understanding BJTs, which are really
current operated devices even though it's true that
a logic inverter is usually designed to be
defined by the voltages of its inputs and outputs.
god i suck...
