Variable Voltage Regulator Design

[AzHole]

I'm working on a design that requires me to control the output voltage on a line that will be used to drive a motor or other item.

http://www.az-prod.com/vregcheck.jpg"

The above link goes to the schematic I have in mind. Please ignore the MOSFET symbols, I'm pretty sure I used a P-Channel mosfet on that schematic instead of an N-Channel mosfet, and I may have them wired wrong on the symbols, but they are correct when they convert to PCB (pin 1 is signal, pin 2 is ground, pin 3 is output for the mos's). Regardless, here's what I'm trying to do.

An I/O chip will fire 1 of 4 I/O lines (designated I/O 1-4 on the schematic) which will in-turn connect the ADJ pin of the voltage regulator (LM317T, U1) to ground and to it's secondary resistor (R2-R5) to specify the voltage that will come out of the VREG. R1 is set to put out 100mA on the output line. The reason for the Mosfet's is because the specific type of I/O logic I'm using puts out a very small current, so the MOS's are bumping up the current to fire the VREG. All of this seems correct to me, however there is one question I can't quite answer.

R6 is a pull-up resistor on the ADJ line of the VREG. What I'm trying to do here, is that when none of the I/O lines are firing, the ADJ pin is pulled high by R6, thereby turning off the VREG. When an I/O line fires, R6 is ignored and the VREG turns on (since it will then have a valid GND line through the MOS). Does this design work?

 

[AzHole]

Bah...just realized that with R6, when an I/O isn't firing, the Output Voltage line will have 5v on it because of R6. So that kind of screws it. All I'm trying to do is regulate that when no I/O is fired, there is not voltage on the Ouput Voltage line. Looks like I'll need another MOS or something on the output line...

 

[berkeman]

A more traditional way to do that would be to use an R2R ladder DAC configuration of resistors at the IO[4:1] outputs, and then buffer the output voltage of the DAC to give you the moderate-power output.

http://en.wikipedia.org/wiki/Resistor_Ladder

 

[AzHole]

A more traditional way to do that would be to use an R2R ladder DAC configuration of resistors at the IO[4:1] outputs, and then buffer the output voltage of the DAC to give you the moderate-power output.

http://en.wikipedia.org/wiki/Resistor_Ladder

Thank you for the R2R ladder info, that does look quite interesting. However, if my I/O can still only source 20mA, doesn't that mean the ladder itself can still only source that much? There's going to be 4 sets of these (16 I/Os total, 4 channels each), and the total output from my logic is only 100mA acrossed all I/Os, so I'm not sure if the R2R ladder will be an effective way of doing it, which is why I was using the deluge of MOS's in the first place to ensure the logic itself wasn't being required to source much current at all. The alternate solution I found, if somewhat messy, was to use a 5th I/O line to trigger one last MOS on the ground line of the output (since the output voltage line in that diagram is only half of the output), making it so that both would have to be triggered by the logic before anything went out the line, removing the need for R6 since I wouldn't care what the VREG was doing while the last MOS was off. It's messy, but I think it would work...

 

[berkeman]

Thank you for the R2R ladder info, that does look quite interesting. However, if my I/O can still only source 20mA, doesn't that mean the ladder itself can still only source that much? There's going to be 4 sets of these (16 I/Os total, 4 channels each), and the total output from my logic is only 100mA acrossed all I/Os, so I'm not sure if the R2R ladder will be an effective way of doing it, which is why I was using the deluge of MOS's in the first place to ensure the logic itself wasn't being required to source much current at all. The alternate solution I found, if somewhat messy, was to use a 5th I/O line to trigger one last MOS on the ground line of the output (since the output voltage line in that diagram is only half of the output), making it so that both would have to be triggered by the logic before anything went out the line, removing the need for R6 since I wouldn't care what the VREG was doing while the last MOS was off. It's messy, but I think it would work...

You don't use the R2R ladder DAC to source current directly. It is a voltage DAC, and as I mentioned, you buffer it with a voltage follower that can source the current you need for your load. You can use an opamp unity gain follower, if that has enough output current, or you can use an opamp+BJT transistor to source more current if needed.

 

[AzHole]

Ok, so something more like this schematic?

My testing bench is telling me that with the R2R later setup this way, the mA coming out the output (heading to the LED) changes depending on which I/O port (A-D) is currenlty on. I'm not real sure if this is the case, or if it's just this very old and wonky workbench I use. But this seems right though? If the OpAmp can output 100mA, then as the voltage changes on its input (from the R2R ladder), the output of the OpAmp will be that set voltage at 100mA maximum. Am I understanding this right?

 

[berkeman]

Close, but not quite right. You need a 2R out of each IO, including the MSB IO, and 2R to GND. There is no resistor out of the top node going into the opamp.

Also, I don't think the "741" will source any 100mA on its own -- most jellybean opamps are more like 10mA output. You can increase the output pullup current by putting an NPN transistor at the opamp output, and closing the feedback around the emitter/output of the transistor.

 

[AzHole]

One last try! The 741 is just what the workbench put there (it's from 1997). I'm actually looking at a MIC7111 OpAmp (25uA Supply to 100mA Current Output at 1.8V to 11V) for use in it. I apologize if this has been annoying for you, but I appreciate the responses. I've been doing some home-made EE for years, but haven't used many components other then IC's and other small things, R2R ladders and OpAmps have never been needed before.

 

[berkeman]

No annoyance at all, happy to help. The 250 Ohm output resistor and the 4.7kOhm pulldown resistor aren't really needed, unless you have something in mind. The R2R ladder DAC and opamp follower are the basic parts of the circuit. The R2R ladder provides the pulldown funcion when all IOs are off, and the 250 Ohm resistor between the ladder and the opamp doesn't really do anything that I see, since the opamp input Z is so high.

Now build up that puppy and test it out!

 

[AzHole]

I think the 250 Ohm output resistor was a left-over when I was trying something out so that one can easily be taken out. I wasn't sure if a pulldown was needed so I threw one in anyways, so again, easily removed (didn't notice the R2R was performing the same funciton as it as you point out). I think I'll fire up my PCB editor and see if I can get this board layout setup, then go hit the hardware store locally and do some bread-board testing just to make sure everything works the way I have in mind.

Thank you very much berk, I appreciate it! I'll let you know how it works when I get the sucker built!

 

[berkeman]

Good stuff. BTW, I just noticed that you don't have a resistor shown in series with the LED to limit the current (unless you're using an LED with a built-in resistor). Remember that the LED will drop about 2V, so size your resistor to give you the current range you want. Also, I didn't check the datasheet for the opamp you mentioned, but keep in mind that many opamps (especially older ones) cannot have the inputs go to the rails, and generally cannot drive the output to the rails. So you often power the opamp from wider rails than the 5V (or 3.3V) of your uC. Check your opamp datasheet and look for the "Input Common-Mode Range" spec, and the output drive level spec.

 

[AzHole]

http://www.micrel.com/_PDF/mic7111.pdf is the data sheet on the OpAmp. The info sheet says it handles rail-to-rail, but I can't find the datasheet entry you're looking for in it (either that or I'm just being blind again...). The LED in the schematic can be ignored. I was using Electronics Workbench (a very old simulator I got years ago) to test the output voltages and the simulator blew up if I didn't have a load of some form on the OpAmp output, so I just threw that into give it a load. In the actual design, where that LED is is going to be an output external to the hardware so that I can plug in a device the I/O will be controlling (in this case a small DC motor). EW doesn't have motors in its inventory, so I just threw the LED in.

 

[berkeman]

http://www.micrel.com/_PDF/mic7111.pdf is the data sheet on the OpAmp.

That's a pretty light-duty opamp, in the 10-15mA output current range. It won't drive a motor directly. You can have it drive the base of an NPN transistor, with the collector connected to 5V, and the emitter driving the motor/load. Put a 10kOhm resistor in parallel with the motor, and connect the opamp feedback to the emitter of the NPN. Size the NPN transistor to handle the max motor current.

BTW, you don't control motor speed with motor voltage generally. Instead, you use pulse width modulation (PWM) of the voltage to the motor. Are you wanting to control motor speed with this varying voltage?

 

[AzHole]

I'll make the changes and add that transistor in (had a feeling he needed to go in the path). A motor is one type of attachment that may or may not go onto the connector. There are a few other devices that may go into that channel (there's 4 channels on the design), such as a relay or other bits of hardware. I know I need to use PWM for a good control over it if it is a motor, but a direct voltage connection is all I really need for this application, as it will work with a motor to some degree and other hardware as well within limits.

 

[berkeman]

Fair enough. BTW, it would be a good exercise for you to simulate the composite circuit (opamp plus NPN inside its feedback) to double-check the overall stability. That opamp looks pretty conservative, with only 25kHz gain-bandwidth product, and 50 degrees of phase margin at unity gain crossover, so stability shouldn't be a problem in your design. But if you were using a faster opamp with less phase margin, adding the active NPN transistor stage inside the feedback loop could cause stability issues. In real-world designs, that's something that we have to pay attention to, especially across variations in supply rail voltage and across the operating temperature range.

You could see if Micrel has a SPICE model for their opamp, and see if you can get a SPICE model for the NPN transistor that you choose, and simulate them to see how the phase margin changes when the NPN is inside the feedback loop.

 

[lukmannet]

Well, let please me interfere according to my own experience. I think Mr. Berkeman is right to suggest you using op-amps as emiter follower. You know that op-amp has a huge gain (>100.000 times). When this output gain is fed back to negative input of the op-amp, the op-amp performs very stable. You know that I use these op-amps for my own project to make a regulator design using positive feedback at http://360.yahoo.com/lukmannet
Talking about your project to make variable output voltages, I suggest using several trimpots in series with a rotary switch. So, you need to tune the trimpots one by one. This seems to be a bit costly. But you have the advantage to regulate the output volatge precisely as you wish.
I hope it's helpful.

Regards,

Luky

 

[Chandra214]

Get in a freewheeling diode for the motor.