Verify XOR Gate Incorrectness on Wikipedia - Expert Help Needed

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Discussion Overview

The discussion centers around the correctness of a Wikipedia article on the XOR gate, specifically regarding the truth table and the configuration of the gate using NAND gates. Participants analyze the logic and outputs of the XOR gate as represented in the article.

Discussion Character

  • Debate/contested
  • Technical explanation

Main Points Raised

  • One participant claims that the Wikipedia article is incorrect, stating that their truth table for the XOR gate produces outputs that are the opposite of what is expected.
  • Another participant argues that the configuration of NAND gates correctly represents an XOR gate, explaining the logic behind the gates using De Morgan's theorem.
  • Several participants confirm that when one input is 1 and the other is 0, the output should indeed be 1, aligning with the expected behavior of an XOR gate.
  • There is a reiteration of the truth table for XOR, which indicates that the output is 1 when exactly one of the inputs is high.
  • One participant emphasizes the exclusive nature of the XOR operation, stating that both inputs cannot be high simultaneously for the output to be high.

Areas of Agreement / Disagreement

Participants generally disagree on the correctness of the Wikipedia article, with some asserting that it is incorrect while others defend the representation of the XOR gate as accurate. The discussion remains unresolved regarding the article's validity.

Contextual Notes

Some assumptions about the interpretation of the truth table and the configuration of NAND gates may not be fully articulated, leading to potential misunderstandings. The discussion does not clarify all mathematical steps involved in the logic analysis.

PsychonautQQ
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http://en.wikipedia.org/wiki/XOR_gate
scroll down a little bit on this article and there is a picture labeled "xor gate made out of nands"

Can somebody verify that this wikipedia article is incorrect for me? The truth table I came up with is the exact opposite of an xor. When a and b are both 0 then the output is 1 and when a and b are both 1 the output is 1, but when a is 1 and b is 0 the output is 0.
 
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It's a XOR. Easy enough to analyze. Take the last NAND gate with the inversions on inputs from previous NAND gates. So the last NAND becomes an OR gate (by De Morgan's), and the two NANDs before it become ANDs. So now if A AND B, then the input to the two AND gates is zero, and the whole thing is zero. Otherwise, A AND gate is high if A, and B AND is high if B. So the OR gate gets A OR B. So the whole thing reads (A OR B) AND (A NAND B). That's obviously a XOR.
 
so as an xor gate, if b is 1 and A is zero the output should be one,... right?
 
Of course. The states of the four NANDS are going to be: Leftmost, 0 NAND 1 = 1. Top, 0 NAND 1 = 1. Bottom, 1 NAND 1 = 0. Rightmost, 0 NAND 1 = 1. And that's your output.
 
PsychonautQQ said:
so as an xor gate, if b is 1 and A is zero the output should be one,... right?

Yup

Code:
A B  |  XOR Result
0  0 |  0 
0  1 |  1
1  0 |  1
1  1 |  0
 
In words - XOR = one or the other but not both
 
PsychonautQQ said:
so as an xor gate, if b is 1 and A is zero the output should be one,... right?

Exclusively or so only (or exclusively) either input can be high and the other has to be low. If both inputs are high your output is low and if both inputs are low your output is low.
 

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