- #1
What is the difference in applying -ve voltage at emitter and +ve coll
- Thread starter dexterdev
- Start date
-
- Tags
- Difference Voltage
Click For Summary
Discussion Overview
The discussion revolves around the differences in applying negative voltage at the emitter versus positive voltage at the collector in a circuit, specifically in the context of Emitter-Coupled Logic (ECL) circuits. Participants explore how these voltage configurations affect the operation of the circuits, particularly in terms of input voltage ranges and transistor behavior.
Discussion Character
- Technical explanation
- Debate/contested
Main Points Raised
- Devanand T questions the differences between applying negative voltage at the emitter and positive voltage at the collector, suggesting that the circuits appear identical.
- One participant notes that the power supply voltages influence the necessary input voltages, indicating that the transistor's state can change based on the grounding of the negative supply line.
- Another participant identifies that the circuit in (a) is a basic ECL unit, specifying input voltage ranges of -1.7 V and -0.8 V for logic states.
- There is a reiteration that while circuit (b) may function similarly, it does not operate with the same input/output voltages as circuit (a).
Areas of Agreement / Disagreement
Participants express differing views on the implications of voltage polarity in the circuits, and the discussion does not reach a consensus on the operational differences between the two configurations.
Contextual Notes
There are unresolved questions regarding the specific operational ranges and conditions under which each circuit configuration functions effectively, as well as the implications of grounding the negative supply line.
